Crossbar Interconnect for Discrete Emulation Chips
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current processor-based hardware emulators face inefficiencies in data communication between emulation chips and boards, leading to increased costs and complexity due to the need for additional emulation steps and coordination, which limits the cost-effective increase in processor count within emulation chips.
Innovation Solution
The implementation of a crossbar architecture that allows direct data coupling between multiple discrete emulation chips, enabling parallel processor communication and reducing the need for extensive emulation steps, while maintaining the functionality of larger chips at a lower cost by using smaller, higher-yielding chips.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the number of processors within an emulation chip is increased to improve computation efficiency, then the computation efficiency is improved, but the manufacturing cost increases due to lower yield from larger chips
Solution Approach 1:
The patent divides a large emulation chip into multiple smaller discrete emulation chips, each containing a subset of processors. These smaller chips can be manufactured at higher yield and lower cost, while still providing the equivalent computational capacity of a single large chip through parallel operation and coordinated data sharing via cross-chip interconnects.
2Adaptability or versatility
If data communication between emulation chips is performed via cable connectors, then communication between boards is enabled, but the communication efficiency decreases due to additional emulation steps and coordination requirements
Solution Approach 1:
The patent merges multiple discrete emulation chips into a unified emulation system where the chips operate as a single logical unit. By integrating cross-chip communication pathways and coordinating the chips through shared control mechanisms, the system achieves efficient data sharing that mimics intra-chip communication speeds, eliminating the performance penalty of traditional cable-based inter-board communication.
Data Source
AI summary
A method and apparatus for coupling data between discrete processor-based emulation chips is described. The apparatus is a processor-based hardware emulation integrated circuits (chips) element comprising a plurality of discrete hardware emulation chips, each emulation chip coupled to another emulation chip by a crossbar for coupling data between the plurality of chips. The method comprises providing data to a crossbar from a first discrete emulation chip, selecting the data from the crossbar using a discrete second emulation chip, and storing the data in a data array in the second discrete emulation chip.