Crossbar-Based Frame Filtering Circuit for Protocol-Adaptive Classification
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Solution Overview
Problem
Current frame filtering technologies face challenges in scalability and resource efficiency, particularly in handling high event rates and diverse communication protocols, leading to increased complexity and silicon footprint, which limits adaptability and flexibility.
Innovation Solution
A circuit comprising configurable comparator units and result-combining logic units with crossbar switches and multiplexers allows for flexible frame classification and filtering, enabling reuse of results and adaptable configurations to suit various applications, reducing resource consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If parallel filter arrangements with deeper filtering are used to handle high event rates and diverse protocols, then filtering speed and capability are improved, but device complexity and silicon footprint increase
Solution Approach 1:
The filter arrangement is divided into multiple filter stages, where each stage processes a subset of filters. This segmentation allows parallel processing within each stage while reducing the complexity burden on any single stage, thereby maintaining high filtering speed without excessive device complexity.
Solution Approach 2:
The patent introduces a multi-dimensional filter structure with filter stages arranged in a hierarchical manner. Filters are distributed across multiple stages and can be selectively activated, adding a dimensional aspect to filter organization that enables efficient parallel processing while managing complexity through structured arrangement.
2Adaptability or versatility
If parallel filter arrangements with deeper filtering are used to handle high event rates and diverse protocols, then filtering capability is improved, but silicon footprint increases
Solution Approach 1:
By segmenting the filter arrangement into multiple stages with selective activation, the patent enables comprehensive filtering capability across diverse protocols while only instantiating the necessary filter resources for each specific application, thereby reducing overall silicon footprint.
Solution Approach 2:
The filter stages are designed with universal structures that can handle multiple protocol types and filtering requirements. This multi-functionality allows a single stage to serve multiple purposes, reducing the need for dedicated hardware for each protocol and thereby minimizing silicon footprint while maintaining versatility.
3Adaptability or versatility
If complex filter arrangements are used to handle diverse communication protocols, then adaptability is improved, but power consumption increases
Solution Approach 1:
The multi-stage filter architecture allows selective activation of only the necessary stages for a given protocol, avoiding the continuous operation of all filters. This segmentation enables protocol-adaptive power management where power consumption scales with the actual filtering requirements rather than maximum capacity.
Solution Approach 2:
The filter arrangement employs dynamic configuration where filter stages can be enabled or disabled based on the specific communication protocol being processed. This dynamic adaptation allows the system to maintain high protocol adaptability while optimizing power consumption by activating only the required filtering resources for each protocol type.
Data Source
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AI summary
A circuit (23) for use in frame filtering is disclosed. The circuit comprises a plurality of comparator units (32, 33, 34). Each comparator unit configured, in response to receiving at least a part of a data frame (22), to perform a determination whether data in a portion (49; Fig. 5) of the at least part of the data frame matches respective reference data (50, 51; Fig. 5) and to provide a result to a comparator unit output (35) based on the determination. The circuit comprises a crossbar switch (37) having crossbar inputs coupled to respective comparator unit outputs (35) and configured to provide sets of crossbar switch outputs via configurable interconnects; and a set of result-combining logic units (123; Fig. 16), each result-combining logic unit coupled to a respective set of crossbar switch outputs, and configured to provide a respective logic unit output (39).