Crossbar Memory Encoding for Parasitic Current Elimination
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Molecular memory arrays face challenges in distinguishing logic '1' from logic '0' as the size increases due to parasitic current paths in the crossbar array architecture, making it difficult to read bits accurately.
Innovation Solution
A two-dimensional crossbar array of molecular devices with a bi-stable device at each junction, where unselected rows and columns are grounded to eliminate parasitic currents, and a balanced encoding scheme is used to ensure half logic '1' and half logic '0' values, making each bit uniquely readable and independent of array size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the memory size is increased by adding more devices to the crossbar array, then the storage capacity is improved, but the difficulty in distinguishing logic '1' from logic '0' increases due to parasitic current paths
Solution Approach 1:
The patent segments the crossbar array into individually addressable cells by applying voltage selectively to specific row and column lines. This segmentation allows isolation of parasitic current paths to individual cells, enabling accurate reading of each cell's state regardless of the total array size. The segmented approach transforms the global parasitic current problem into localized manageable effects.
Solution Approach 2:
The patent introduces ground connections as intermediary elements between unselected rows and columns. By grounding unselected lines, the patent creates a controlled electrical environment that blocks parasitic current paths from interfering with the selected cell measurement. This intermediary grounding mechanism enables accurate bit reading in large arrays by systematically managing parasitic effects.
2Measurement precision
If unselected rows and columns are grounded to eliminate parasitic currents, then the bit readability is improved, but the device complexity increases due to additional grounding circuitry
Solution Approach 1:
The patent makes the row and column lines serve multiple functions: they act as both address selection lines and as grounding lines for unselected rows/columns. This multi-functionality eliminates the need for separate dedicated grounding circuitry, reducing device complexity while maintaining the ability to eliminate parasitic currents. The same physical lines perform both selection and grounding roles depending on their state.
Solution Approach 2:
The crossbar array structure itself provides the grounding function through its inherent architecture. The unselected rows and columns automatically serve as ground references without requiring external grounding circuitry. The array structure itself manages parasitic current paths by utilizing its own lines for grounding purposes, making the system self-sufficient and reducing overall complexity.
Data Source
AI summary
A method of encoding data stored in a crossbar memory array, such as a nanowire crossbar memory array, to enable significant increases in memory size, modifies data words to have equal numbers of ‘1’ bits and ‘0’ bits, and stores the modified words together with information enabling the original data to be retrieved upon being read out from memory.