3D Selector Surface Area for Crossbar Array Leakage Control
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Solution Overview
Problem
Conventional crossbar array circuits face challenges in reducing sneak path currents and increasing operation currents without increasing operation voltage or device size, which affects power efficiency and density in high-density memory applications.
Innovation Solution
Increasing the surface area of selectors in crossbar array circuits by forming a 3D structure or vertical extensions of tunneling-based selectors, which allows for efficient leakage control and higher current density without increasing voltage or device size, using materials like TaN1+x and Ta2O5 for enhanced selectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional 2D crossbar array circuits are used, then device size is small, but selector surface area is insufficient leading to high sneak path currents
Solution Approach 1:
The patent transitions from conventional 2D crossbar array to a 3D architecture by forming vertical extensions of selectors using isolation layers with heights ranging from 100 nanometers to 10 micrometers. This dimensional change increases the selector surface area from a planar configuration to a three-dimensional structure, enabling better leakage control through enhanced surface area without increasing the lateral device footprint.
2Power
If operation voltage is increased to increase operation currents, then current density improves, but power consumption increases
Solution Approach 1:
The patent changes the geometric parameters of the selector by introducing vertical extensions with controlled heights (100 nm to 10 μm) and forming multi-layer structures including isolation layers, RRAM stacks, and selector stacks. This parameter change increases the effective surface area of the selector, thereby increasing operation current density without requiring an increase in operation voltage, thus avoiding additional power consumption.
3Reliability
If device size is increased to increase selector surface area, then leakage control improves, but device density decreases
Solution Approach 1:
The patent resolves the contradiction between leakage control and device density by utilizing the vertical dimension to increase selector surface area. The isolation layers and vertical extensions provide additional surface area for leakage control while maintaining a compact lateral footprint, thereby preserving high device density in the crossbar array.
4Reliability
If conventional 2D crossbar architecture is used, then manufacturing is simple, but sneak path currents are high
Solution Approach 1:
The patent introduces a 3D architecture with vertical extensions formed by deposition and etching processes. The isolation layers are formed with specific height ranges (100 nm to 10 μm) to provide the necessary surface area for sneak path current suppression. This architectural enhancement, while more complex than 2D, remains manufacturable using standard semiconductor fabrication techniques.
Data Source
AI summary
A method for forming a crossbar circuit is provided. The method may include forming a Resistive Random-Access Memory (RRAM) stack on a first line electrode and a substrate, forming an isolation layer on the first line electrode and the RRAM stack, etching the isolation layer to expose a top surface of the RRAM stack, and forming a selector stack on the top surface of the RRAM stack, a sidewall of the isolation layer, and an upper surface of the isolation layer. The method may further include forming a second line electrode on the selector stack.