Crossbar Switch Synthesis Using Segmented Multiplexer Blocks
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Solution Overview
Problem
As semiconductor technology advances, building crossbar switch arrangements becomes increasingly difficult due to shrinking transfer and structure sizes, leading to decreased wire quality and challenges in routing and meeting timing requirements with existing synthesis tools.
Innovation Solution
A method for automatically generating design data for semiconductor circuits using predefined multiplexer building blocks, including multiplexers, input drivers, and select drivers, which involves regular placement, testing for timing constraints, and re-synthesis or replacement of these blocks to ensure compliance with timing requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If transfer and structure sizes are shrunk to advance semiconductor technology, then device integration and functionality are improved, but wire quality deteriorates and timing requirements become harder to meet
Solution Approach 1:
The crossbar switch is segmented into multiple sub-crossbar switches, each handling a portion of the routing traffic. This segmentation allows for smaller, more manageable wire lengths within each sub-crossbar while maintaining the overall functionality of the larger crossbar structure, thereby preserving wire quality despite technology scaling.
Solution Approach 2:
The patent introduces a hierarchical dimension to the crossbar architecture by organizing sub-crossbars in multiple levels. This dimensional approach allows routing to be distributed across different hierarchical levels, reducing the physical wire length and improving wire quality while maintaining high device integration.
2Device complexity
If known synthesis tools are used for routing in highly congested environments, then design simplicity is maintained, but timing requirements cannot be properly met
Solution Approach 1:
The patent performs preliminary timing analysis and constraint specification before the actual routing synthesis. By pre-defining timing requirements and analyzing potential timing issues before routing is generated, the method ensures that timing constraints are met from the outset, even in highly congested environments, without requiring complex iterative adjustments.
Solution Approach 2:
The synthesis process incorporates feedback mechanisms where timing analysis results are fed back into the routing generation. If timing requirements are not met, the routing is automatically adjusted based on the timing feedback, allowing the tool to iteratively improve timing performance while maintaining design automation.
3Adaptability or versatility
If crossbar switch size is increased to improve routing capacity, then connectivity is improved, but wire quality decreases due to longer wire lengths
Solution Approach 1:
The large crossbar switch is divided into multiple smaller sub-crossbar switches, each with shorter internal wire lengths that maintain high wire quality. The segmentation preserves the overall routing capacity by providing multiple parallel paths through the sub-crossbars, effectively distributing the connectivity requirements across smaller units.
Solution Approach 2:
The patent introduces intermediate routing layers and buffer elements between input and output lines. These intermediaries break up the direct long wire paths into shorter segments, maintaining signal quality while preserving the overall routing capacity of the crossbar structure.
Data Source
AI summary
A facility is provided for automatically generating design data for a semiconductor circuit including a crossbar switch. The method includes synthesizing the crossbar switch using predefined multiplexer building blocks, where the predefined multiplexer building blocks include at least a multiplexer, an input driver and a select driver. In addition, the method includes regularly placing the predefined multiplexer building blocks to define a crossbar switch arrangement, testing the crossbar switch arrangement for timing constraints and re-synthesizing the crossbar switch and/or replacing the predefined multiplexer building blocks based on the testing.