Cross-bar Vertical Transport FETs Without Corner Rounding
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Solution Overview
Problem
Vertical transport field effect transistors (VTFETs) face challenges with corner rounding issues during the formation of H-shaped fin structures, leading to non-uniform fin dimensions which compromise current control and threshold voltage control in transistors.
Innovation Solution
A method involving the formation of a sacrificial epitaxial layer around semiconductor fins, followed by cutting and using the remaining portion as a mandrel to form additional fins, and subsequent epitaxial layer growth to minimize corner rounding, with the lower source/drain area formed on a shallow trench isolation (STI) region, ensuring straight fin structures and rectangular corners.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional fabrication processes are used to form H-shaped fin structures, then the device can be manufactured, but corner rounding occurs leading to non-uniform fin dimensions
Solution Approach 1:
A sacrificial epitaxial layer is formed around the first semiconductor fin before the second and third fins are created. This preliminary structure serves as a mandrel that guides the formation of subsequent fins, ensuring straight edges and rectangular corners are maintained throughout the fabrication process, thereby preventing corner rounding issues
Solution Approach 2:
The sacrificial epitaxial layer acts as an intermediary mandrel structure that enables precise formation of the H-shaped fin configuration. This intermediate structure provides physical guidance during fabrication, ensuring uniform fin dimensions and sharp corners, and is removed after serving its shaping purpose
2Reliability
If corner rounding is eliminated through precise fabrication, then current control and threshold voltage control are improved, but the fabrication process becomes more complex
Solution Approach 1:
The sacrificial epitaxial layer is formed using standard epitaxial growth processes that automatically conform to the underlying fin structure. The self-aligned nature of this process eliminates the need for additional alignment steps and complex patterning, achieving precise fin formation while keeping the fabrication process relatively simple
Solution Approach 2:
The invention changes the physical state and positioning of materials during fabrication by introducing a sacrificial epitaxial layer that can be selectively formed and removed. This parameter change in the fabrication approach enables precise corner formation without requiring fundamentally new fabrication techniques, thus improving reliability without excessively increasing complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach eliminates corner rounding, resulting in uniform fin dimensions and improved current control and threshold voltage management in VTFETs, enhancing the performance of vertical transport FETs.
Implementation Method 1
A sacrificial epitaxial layer is formed around the first semiconductor fin
Implementation Method 2
a second semiconductor fin and a third semiconductor fin are formed using the remaining portion of the sacrificial epitaxial layer as a mandrel
Data Source
AI summary
A semiconductor device structure for a vertical field effect transistor comprises a substrate with a shallow trench isolation (STI) region. A lower source/drain area is formed on the STI region with a first semiconductor fin, a second semiconductor fin, and a third semiconductor fin. The third semiconductor fin is formed to couple the first semiconductor fin to the second semiconductor fin across the lower source/drain area. The STI region that is beneath the lower source/drain area comprises opposing sidewall portions curved in opposing directions. In one example the lower source/drain area is formed only at an intersection between the STI region and one or more of the first semiconductor fin, the second semiconductor fin, and the third semiconductor fin. In other example, the second semiconductor fin is disposed parallel to the first semiconductor fin and together with the third semiconductor fin resulting in an H-shaped structure from a top-down view.