Crosshatch Patterning for Sub-Lithographic Semiconductor Features

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current lithographic techniques have limitations in achieving smaller feature sizes and higher integration densities in semiconductor processing, as they are constrained by minimum capable feature sizes, hindering the formation of highly-integrated circuitry such as DRAM and NAND memory arrays.

Innovation Solution

The method involves forming a grid pattern by overlaying a second series of lines across a first series of lines to create a crosshatch pattern, using selectively etchable materials and processes like photolithography and plasma etching to achieve sub-lithographic feature sizes, which are then used to fabricate highly-integrated circuitry by extending the pattern into underlying materials and forming openings that expose regions for further processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional lithographic techniques are used, then manufacturing simplicity is maintained, but feature size reduction and integration density are limited by minimum capable feature sizes

Engineering Contradiction:
Improvefeature sizeVSAvoidpatterning process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patterning process is divided into multiple sequential steps: forming first lines at a first pitch, forming second lines at a different orientation to create a crosshatch pattern, and using these as masks for subsequent etching. This segmentation allows achieving sub-lithographic pitch multiplication (e.g., 2x or 4x density) while managing complexity through structured process stages

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from two-dimensional planar patterning to three-dimensional vertical structures by forming lines extending into the substrate and creating overlapping patterns at different orientations. This dimensional approach enables pitch multiplication by utilizing vertical depth and angular relationships rather than relying solely on lateral resolution

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If pitch multiplication is implemented to achieve sub-lithographic features, then integration density increases, but process complexity and manufacturing difficulty increase

Engineering Contradiction:
Improveintegration densityVSAvoidpatterning process ease
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The method performs preliminary patterning actions by first forming lines of material at controlled pitches and orientations before the final etching step. These pre-formed lines serve as self-aligned masks that define the subsequent pattern, ensuring precise sub-lithographic feature formation without requiring direct lithographic patterning at the final pitch

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent utilizes parameter changes in material properties (selective etchability between different materials) and process conditions (anisotropic vs. isotropic etching) to achieve pattern transfer. By changing etch selectivity parameters and directional etching parameters, the process achieves high precision pattern formation through material property differentiation rather than relying solely on lithographic resolution

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the creation of higher density integrated circuit patterns beyond conventional lithographic limits, allowing for the fabrication of more compact and densely integrated semiconductor structures, such as DRAM and NAND memory arrays, by reducing the pitch and achieving sub-lithographic feature sizes.

Implementation Method 1

The material may be anisotropically etched to form the sub-lithographic features

Methodology Applied
Scientific EffectAnisotropic etching:

Implementation Method 2

Lithographic processes, such as photolithography, are commonly utilized during semiconductor processing

Methodology Applied
Scientific EffectPhotolithography: Photography

Data Source

PatentUS8946086B2Methods of forming patterns, and methods of forming integrated circuitry
Publication Date: 2015.02.03 MICRON TECHNOLOGY INC
  • US8946086B2 patent drawing
  • US8946086B2 patent drawing
  • US8946086B2 patent drawing

AI summary

Some embodiments include methods of forming a pattern. First lines are formed over a first material, and second lines are formed over the first lines. The first and second lines form a crosshatch pattern. The first openings are extended through the first material. Portions of the first lines that are not covered by the second lines are removed to pattern the first lines into segments. The second lines are removed to uncover the segments. Masking material is formed between the segments. The segments are removed to form second openings that extend through the masking material to the first material. The second openings are extended through the first material. The masking material is removed to leave a patterned mask comprising the first material having the first and second openings therein. In some embodiments, spacers may be formed along the first and second lines to narrow the openings in the crosshatch pattern.