Crosspoint Memory Cell with Etched Access Device
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Solution Overview
Problem
Conventional methods for forming crosspoint memory arrays, such as resistive memory, require multiple processing steps and often damage or modify the phase change material during reactive ion etching, making it impractical to pattern memory elements without compromising their integrity.
Innovation Solution
A crosspoint memory structure is developed using a fill-in memory element with an etched access device, where the phase change material is not exposed to reactive ion etching chemistry, and a sacrificial masking layer is used to minimize processing steps and maintain the integrity of the phase change material.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a single patterning using reactive ion etching (RIE) is used to minimize masking layers and processing steps, then the number of processing steps is reduced, but the phase change material is damaged or modified during the RIE process
Solution Approach 1:
The patent segments the patterning process into two distinct parts: (1) RIE is used only for etching the access device, and (2) a separate fill-in process is used for forming the memory element. This segmentation allows each process to be optimized independently, preventing damage to the phase change material while maintaining process efficiency.
Solution Approach 2:
The patent introduces a sacrificial masking layer as an intermediary component that enables the access device to be etched by RIE without exposing the phase change material to damaging chemistry. The sacrificial layer acts as a protective mediator during the etching process.
2Reliability
If multiple processing steps are used to form reliable memory cells, then the integrity of phase change material is maintained, but the number of masking layers and processing steps increases
Solution Approach 1:
The patent merges the formation of the access device and memory element into a unified process flow where the sacrificial masking layer serves dual purposes: it protects the memory element during access device etching and defines the memory element pattern through the fill-in process. This merging reduces the total number of masking layers required.
3Productivity
If conventional RIE patterning is applied to memory elements, then processing steps are minimized, but the phase change material undergoes unwanted modification
Solution Approach 1:
The patent converts the potentially harmful RIE chemistry into a beneficial tool by restricting its application exclusively to the access device etching, where it provides precise pattern definition without causing damage. The harmful aspect (RIE chemistry) is redirected to a useful purpose while protecting the sensitive phase change material.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the formation of reliable memory cells with reduced processing steps, self-aligned wiring, and the ability to create three-dimensional memory architectures without exposing the phase change material to etching processes, enhancing the stability and reliability of the memory cells.
Implementation Method 1
A single pattering using reactive ion etching (RIE) of the memory element and the access device
Data Source
AI summary
An illustrative method of fabricating a memory array structure includes: forming at least one access device layer on an upper surface of a first conductive layer, the access device layer being in electrical connection with the first conductive layer; forming a sacrificial layer on an upper surface of the access device layer; etching the access device layer and the sacrificial layer using a same masking feature to form an access device that is self-aligned with a portion of the sacrificial layer; replacing a portion of the sacrificial layer with memory storage material to form a storage element, a first terminal of the storage element being in electrical connection with the access device; and forming a second conductive layer on an upper surface of the storage element, a second terminal of the storage element being in electrical connection with the second conductive layer.