Crosspoint Memory Via Layout for Lower Electrode Resistance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In memory devices, thermal barrier materials increase resistance when present in the electrode path, reducing current delivery to memory cells, especially when signals pass through them twice, which affects the programming and reading of states in memory cells.
Innovation Solution
Depositing thermal barrier material before the array termination etch to remove it over the conductive via area, allowing direct interface between the conductive via and access lines, and using liner and cap materials to mitigate manufacturing damage and resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If thermal barrier material is present in the electrode path, then thermal properties are improved, but resistance increases and current delivery is reduced
Solution Approach 1:
The thermal barrier material deposition process is segmented into two stages: first depositing the thermal barrier material over the entire array, then performing an array termination etch to selectively remove it from the conductive via area. This segmentation allows the thermal barrier to protect memory stacks during manufacturing while enabling low-resistance current paths in operational regions.
Solution Approach 2:
The thermal barrier material is applied non-uniformly across the device - present over memory stacks to provide thermal protection, but removed from conductive via areas to minimize resistance. This local quality variation optimizes both thermal management and electrical performance in different regions of the device.
2Manufacturing precision
If thermal barrier material is deposited before array termination etch, then manufacturing precision is improved, but resistance is reduced in specific areas
Solution Approach 1:
The thermal barrier material is deposited before the array termination etch process, establishing a protective layer that prevents manufacturing damage to memory stacks during subsequent processing steps. The preliminary deposition ensures thermal protection is in place before any high-temperature or mechanically stressful operations occur.
Solution Approach 2:
After the thermal barrier material serves its protective function during manufacturing, it is selectively extracted from the conductive via area through the array termination etch process. This extraction removes the harmful resistance effect in regions where low resistance is critical for current delivery to memory cells.
3Temperature
If signals pass through thermal barrier material twice, then thermal protection is enhanced, but current delivery efficiency deteriorates
Solution Approach 1:
The patent converts the harmful effect of thermal barrier material (increased resistance) into a beneficial outcome by using the array termination etch to selectively remove it from conductive via areas. The thermal barrier material's presence during manufacturing provides protection (benefit), and its subsequent removal from specific areas eliminates the resistance penalty (harm conversion).
Data Source
AI summary
Methods, systems, and devices for a low resistance crosspoint architecture are described. A manufacturing system may deposit a thermal barrier material, followed by a first layer of a first conductive material, on a layered assembly including a patterned layer of electrode materials and a patterned layer of a memory material. The manufacturing system may etch a first area of the layered assembly to form a gap in the first layer of the first conductive material, the thermal barrier material, the patterned layer of the memory material, and the patterned layer of electrode materials. The manufacturing system may deposit a second conductive material to form a conductive via in the gap, where the conductive via extends to a height within the layered assembly that is above the thermal barrier material.