Crosstalk Analysis Method for Multi-Layer PCB Layout Optimization

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Solution Overview

Problem

Dual stripe line difference layer designs in electronic products lead to high-speed signal interference, making it difficult to control the quality and detect defects in lighter and thinner electronic products due to increased complexity and layer thickness.

Innovation Solution

A crosstalk analysis method executed by a computer, involving a layout program and crosstalk analysis program that estimates crosstalk values based on parameters like trace width, shift, and parallel length, and provides an interface for adjusting the layout to reduce interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Weight of moving object

If the thickness of the printed circuit board is reduced and the number of layers is increased to achieve lighter and thinner electronic products, then the weight and thickness of the product are reduced, but high-speed signal interference (crosstalk) increases and quality control becomes more difficult

Engineering Contradiction:
Improveweight of electronic productVSAvoidsignal quality
Core Design Contradiction:
Weight of moving objectVSReliability

Solution Approach 1:

The patent applies preliminary action by performing crosstalk analysis during the layout design phase before manufacturing. The system calculates crosstalk values using parameters such as trace width, spacing, and layer configuration, and provides feedback to adjust the layout to prevent excessive crosstalk before the product is manufactured, thus ensuring signal quality in thin, multi-layer designs

Inventive Principle:
Principle #10Preliminary action

2Length of stationary object

If the number of layers is increased to achieve lighter and thinner electronic products, then the thickness of the printed circuit board is reduced, but the complexity of the design increases and defects are not easily detected

Engineering Contradiction:
Improvethickness of printed circuit boardVSAvoiddesign complexity
Core Design Contradiction:
Length of stationary objectVSDevice complexity

Solution Approach 1:

The patent replaces complex manual analysis and detection methods with an automated computer-based crosstalk analysis system. The system automatically calculates crosstalk values based on layout parameters and provides objective feedback, eliminating the need for complex manual calculations and making it easier to manage and detect issues in multi-layer designs

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Length of stationary object

If the number of layers is increased to achieve lighter and thinner electronic products, then the thickness of the printed circuit board is reduced, but defects are not easily detected

Engineering Contradiction:
Improvethickness of printed circuit boardVSAvoiddefect detection difficulty
Core Design Contradiction:
Length of stationary objectVSDifficulty of detecting and measuring

Solution Approach 1:

The patent implements feedback by providing crosstalk analysis results that indicate whether the calculated crosstalk value exceeds a predetermined threshold. This feedback mechanism guides designers to adjust the layout to reduce crosstalk, making it easier to detect and correct potential defects in thin, multi-layer printed circuit boards during the design phase

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9015644B2Crosstalk analysis method
Publication Date: 2015.04.21 WISTRON CORP
  • US9015644B2 patent drawing
  • US9015644B2 patent drawing
  • US9015644B2 patent drawing

AI summary

An embodiment of the disclosure provides a crosstalk analysis method executed by a computer including: executing a layout program for a layout circuit; executing a crosstalk analysis program; acquiring, by the crosstalk analysis program, a plurality of parameters from a layout result generated by the layout program; estimating a crosstalk value according to the parameters; determining whether the crosstalk value is larger than a predetermined value; providing an interface for showing information of the layout result and adjusting a plurality of lines of the layout circuit.