Cryogenic Ion Beam Etching for STT-RAM Diffusion Control

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Solution Overview

Problem

Ion beam etching for forming spin-torque-transfer random access memory (STT-RAM) devices faces challenges in minimizing diffusion-related damage and conductive material formation on the tunneling dielectric layer, which can lead to shorts and device failure, especially as feature sizes shrink.

Innovation Solution

The method involves a two-step ion beam etching process with controlled substrate temperature and ion energy, followed by a conductive material mitigation operation using inert or reactive ions to oxidize or remove conductive material, and optionally preferential deposition of non-conductive materials to minimize diffusion and shorts. The substrate support is cooled during certain steps to reduce diffusion and oxidation-related damage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If ion beam etching is performed at higher temperatures, then etching efficiency is improved, but diffusion-related damage increases causing device failure

Engineering Contradiction:
Improveetching efficiencyVSAvoiddevice quality
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The etching process is divided into multiple sequential steps with different temperature conditions: a first etching step at higher temperature (10-120°C) for efficient material removal, followed by a second etching step at lower temperature (−70°C to −10°C) for precision work and damage mitigation. This segmentation allows each step to optimize for its specific function.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The substrate temperature is dynamically adjusted during the etching process rather than maintained at a constant value. The temperature is changed between processing steps to match the requirements of each operation, enabling the system to adapt to different process demands and minimize damage while maintaining efficiency.

Inventive Principle:
Principle #15Dynamics

2Manufacturing precision

If ion beam etching is performed to define features, then feature definition is achieved, but conductive material forms on the tunneling dielectric layer causing shorts

Engineering Contradiction:
Improvefeature definitionVSAvoidconductive material formation
Core Design Contradiction:
Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

The conductive material that forms on the tunneling dielectric layer during etching is not simply treated as waste to be removed, but is converted into a beneficial outcome through oxidation. The lower energy ion beam exposure at cryogenic temperatures oxidizes the conductive material, transforming it into a non-conductive state that prevents shorts while maintaining the defined feature geometry.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The ion energy parameter is changed between processing steps: higher ion energy is used for efficient etching and feature definition, then lower ion energy is used for the mitigation step to oxidize conductive material without causing additional damage or altering the defined features. This parameter change enables the same process to achieve opposite effects at different stages.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If lower ion energy is used to reduce substrate damage, then diffusion-related damage is reduced, but etching efficiency decreases

Engineering Contradiction:
Improvesubstrate qualityVSAvoidetching efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The etching process is divided into multiple sequential steps with different temperature conditions: a first etching step at higher temperature (10-120°C) for efficient material removal, followed by a second etching step at lower temperature (−70°C to −10°C) for precision work and damage mitigation. This segmentation allows each step to optimize for its specific function.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The process alternates between high-energy/higher-temperature etching phases for efficiency and low-energy/lower-temperature mitigation phases for quality. This periodic action between contrasting conditions allows the system to achieve both high productivity and high reliability over the complete processing cycle.

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces diffusion-related damage and the risk of shorts across the tunneling dielectric layer, expanding the processing window and improving the quality of STT-RAM devices by effectively managing conductive material formation and minimizing substrate damage.

Implementation Method 1

a cooled substrate support is used during particular processing steps, which may reduce the degree of diffusion-related damage that occurs

Methodology Applied
Scientific EffectCryogenic cooling: Cryogenics

Implementation Method 2

The impinging ions strike the substrate surface and remove material through momentum transfer

Methodology Applied
Scientific EffectMomentum transfer: Conservation of Momentum

Implementation Method 3

remove material through momentum transfer (and through reaction in the case of reactive ion etching)

Methodology Applied
Scientific EffectChemical reaction: Chemical Bonding

Implementation Method 4

exposing the substrate to ion beams, where the conductive material mitigation operation is performed... During the conductive material mitigation operation, the ion beams may include oxygen ions

Methodology Applied
Scientific EffectOxidation: Oxidation

Data Source

PatentUS11289306B2Ion beam etching utilizing cryogenic wafer temperatures
Publication Date: 2022.03.29 LAM RES CORP
  • US11289306B2 patent drawing
  • US11289306B2 patent drawing
  • US11289306B2 patent drawing

AI summary

The embodiments herein relate to methods and apparatus for etching features in semiconductor substrates. In a number of cases, the features may be etched while forming a spin-torque-transfer random access memory (STT-RAM) device. In various embodiments, the substrate may be cooled to a low temperature via a cooled substrate support during particular processing steps. The cooled substrate support may have beneficial impacts in terms of reducing the degree of diffusion-related damage in a resulting device. Further, the use of a non-cooled substrate support during certain other processing steps can likewise have beneficial impacts in terms of reducing diffusion-related damage, depending on the particular step. In some implementations, the cooled substrate support may be used in a process to preferentially deposit a material (in some cases a reactant) on certain portions of the substrate.