Cryogenic Electronic Packages Integrating Superconducting Multichip Modules

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Solution Overview

Problem

The integration of superconducting semiconductor structures into cryogenic chambers for high-performance computing applications is challenging due to the large number of individual chips and limited cryogenic space, leading to inefficiencies in power consumption and operational performance.

Innovation Solution

The development of cryogenic electronic packages and assemblies that integrate superconducting multichip modules with non-superconducting semiconductor structures using an interposer to redistribute wiring, allowing for a higher density of components within a given cryogenic space, thereby enabling efficient high-performance computing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If superconducting semiconductor structures are integrated into cryogenic chambers for high-performance computing, then computational power and energy efficiency are improved, but the limited cryogenic space and large number of individual chips required create integration challenges and increased device complexity

Engineering Contradiction:
Improvecomputational powerVSAvoidintegration complexity
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

The patent combines multiple superconducting chips and non-superconducting components into a single integrated cryogenic electronic package. The package integrates superconducting multichip modules with non-superconducting semiconductor structures, interposers, and interconnect structures into one unified assembly that can be installed as a single unit in the cryogenic chamber, thereby reducing integration complexity while maintaining high computational power

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The cryogenic electronic package serves multiple functions simultaneously: it provides superconducting computation, non-superconducting control logic, signal routing through interposers, and thermal management all within a single integrated structure. This multi-functionality reduces the number of separate components needed in the cryogenic chamber

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Power

If individual superconducting chips are used to achieve high-performance computing, then computational capability is improved, but the large number of chips required increases the space needed in the cryogenic chamber

Engineering Contradiction:
Improvecomputational capabilityVSAvoidcryogenic space
Core Design Contradiction:
PowerVSArea of stationary object

Solution Approach 1:

Multiple superconducting chips are merged into a single superconducting multichip module within the cryogenic package, reducing the number of separate chip installations needed in the cryogenic chamber while maintaining the computational capability of multiple chips working together

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent employs a nested structure where superconducting chips are integrated within multichip modules, which are then integrated within the cryogenic electronic package along with non-superconducting components. This nesting allows maximum component density within the limited cryogenic space

Inventive Principle:
Principle #7Nested doll (Nesting)

3Power

If more superconducting semiconductor structures are integrated into the cryogenic chamber, then high-performance computing capability is improved, but power consumption increases due to the large number of components

Engineering Contradiction:
Improvecomputing performanceVSAvoidpower consumption
Core Design Contradiction:
PowerVSUse of energy by moving object

Solution Approach 1:

The integration of superconducting and non-superconducting components into a single package allows for optimized power distribution and reduced redundant connections, lowering overall power consumption while maintaining high computing performance

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The interposer acts as an intermediary that efficiently routes signals and power between superconducting chips and external systems, reducing power loss in interconnects and improving overall energy efficiency of the high-performance computing system

Inventive Principle:
Principle #24Intermediary (Mediator)

4Quantity of substance

If the cryogenic chamber space is increased to accommodate more components, then component density is improved, but the cost and complexity of the cryogenic system increases

Engineering Contradiction:
Improvecomponent densityVSAvoidcryogenic system complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

By combining multiple functional components into a single integrated package, the patent achieves high component density without requiring a larger cryogenic chamber, thereby avoiding the increased complexity and cost associated with scaling up the cryogenic system

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the design of high-performance computing circuitry to fit within existing cryogenic spaces, reducing power consumption and enhancing operational efficiency by maximizing the use of available space and maintaining the integrity of superconducting semiconductor structures at both room and cryogenic temperatures.

Implementation Method 1

superconducting technology and superconducting semiconductor structures (e.g., integrated circuits) fabricated using such technology are a leading candidate technology for high performance computing applications (e.g., due to the energy efficiency of superconducting technology)

Methodology Applied
Scientific EffectSuperconductivity: Superconductivity

Data Source

PatentUS10586909B2Cryogenic electronic packages and assemblies
Publication Date: 2020.03.10 MASSACHUSETTS INST OF TECH
  • US10586909B2 patent drawing
  • US10586909B2 patent drawing
  • US10586909B2 patent drawing

AI summary

A cryogenic electronic package includes a circuitized substrate, an interposer, a superconducting multichip module (SMCM) and at least one superconducting semiconductor structure. The at least one superconducting semiconductor structure is disposed over and coupled to the SMCM, and the interposer is disposed between the SMCM and the substrate. The SMCM and the at least one superconducting semiconductor structure are electrically coupled to the substrate through the interposer. A cryogenic electronic assembly including a plurality of cryogenic electronic packages is also provided.