Cryogenic Data Output Circuit With Selective Pad Reset
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Solution Overview
Problem
Existing cryogenic transmitters using Josephson junctions face challenges with power consumption and speed due to RC delays and charging/discharging operations of decoupling capacitors, which are inefficient in stabilizing supply voltages.
Innovation Solution
A semiconductor memory device with a data output circuit that selectively performs reset operations by adjusting power supply voltage or resistance values based on logical relationships between data, allowing for reduced power consumption and high-speed data transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If decoupling capacitors are coupled to supply voltage terminals to stabilize supply voltage levels, then supply voltage stability is improved, but RC delay increases and power consumption increases due to charging/discharging operations
Solution Approach 1:
The patent removes decoupling capacitors from the supply voltage terminals in the cryogenic transmitter circuit. By extracting these capacitive elements, the circuit eliminates the RC delay associated with capacitor charging/discharging while maintaining supply voltage stability through alternative means such as optimized power supply network design and Josephson junction characteristics.
Solution Approach 2:
The patent changes the electrical parameters of the power supply network by eliminating capacitive coupling and adjusting resistance values in real-time. This parameter change allows the circuit to achieve both fast response (reduced time constant) and stable voltage levels without relying on decoupling capacitors, thereby resolving the contradiction between stability and speed.
2Stability of the object's composition
If decoupling capacitors are coupled to supply voltage terminals to stabilize supply voltage levels, then supply voltage stability is improved, but power consumption increases due to charging/discharging operations
Solution Approach 1:
The patent extracts decoupling capacitors from the circuit configuration. By removing these energy-consuming capacitive elements, the circuit eliminates continuous charging/discharging current paths that cause power loss, while maintaining voltage stability through the inherent properties of the superconducting circuit and optimized power delivery network.
Solution Approach 2:
The cryogenic transmitter circuit uses its own operational characteristics (superconducting state, Josephson junction behavior) to self-regulate and stabilize supply voltages without requiring external decoupling capacitors. The circuit inherently maintains voltage levels through its superconducting properties, eliminating the need for additional energy-consuming stabilization components.
3Reliability
If reset operation is performed by transitioning power supply voltage from target level to reset level, then data pad reset is achieved, but power consumption increases during output disable period
Solution Approach 1:
The patent implements dynamic control of resistance values in the power supply path using controllable switches (such as SFQ switches or transistor-based switches). During the output disable period, the resistance is dynamically adjusted to a high state to block current flow and prevent power consumption, while still allowing voltage transition for reset operations when needed. This dynamic resistance control enables the circuit to achieve reliable data pad reset only when necessary, eliminating continuous power loss.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables low-power and high-speed data transmission by skipping unnecessary reset operations and adjusting resistance values, thereby reducing power consumption and improving transmission efficiency.
Implementation Method 1
The transmitter in accordance with the related art effectively transmits a signal in a cryogenic environment by utilizing hysteresis characteristics of the Josephson junctions.
Implementation Method 2
a transmitter using Josephson junctions
Implementation Method 3
The data output circuit may perform the reset operation by adjusting a resistance value of a path of an internal current from a low resistance value to a high resistance value during the output disable period
Data Source
AI summary
A semiconductor memory device includes a memory region from which first data and second data are sequentially read, and a data output circuit suitable for selectively performing a reset operation on a data pad according to a logical relationship between the first and second data during an output disable period between a first output enable period corresponding to first output data and a second output enable period corresponding to second output data, when sequentially outputting the first and second output data corresponding to the first and second data through the data pad.