Cryptographic Accelerator Buffer Randomization for Side-Channel Resistance
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Solution Overview
Problem
Existing cryptographic processing systems are vulnerable to side-channel analysis techniques, such as differential power analysis (DPA), due to predictable processing orders of data blocks, which can be exploited by attackers to compromise security.
Innovation Solution
Randomizing the processing order of data blocks within and across sets of blocks, using a cryptographic accelerator that randomly selects blocks for processing and stores them in a random order, making it difficult for attackers to correlate side-channel information with specific data blocks being processed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data blocks are processed in a predictable sequential order, then processing efficiency is maintained, but security vulnerability to side-channel attacks increases
Solution Approach 1:
The patent implements dynamic processing order by randomly selecting data blocks from the buffer for processing, rather than following a fixed sequential order. This randomness makes side-channel attacks ineffective while the buffer management system dynamically adapts to maintain efficient processing throughput.
Solution Approach 2:
The buffer acts as an intermediary between memory and processing elements, decoupling the predictable memory access pattern from the processing order. This intermediary layer allows random selection of blocks for processing while maintaining efficient buffer utilization and processing throughput.
2Reliability
If data blocks are randomized for processing, then resistance to side-channel attacks improves, but processing overhead and complexity increase
Solution Approach 1:
Data blocks are pre-loaded into the buffer in batches from memory before random processing begins. This preliminary action separates the memory access phase from the processing phase, allowing randomization during processing without adding per-block memory access overhead.
Solution Approach 2:
The buffer continuously supplies data blocks to processing elements in random order while memory continuously loads new blocks into the buffer. This continuous operation ensures that processing elements remain busy with useful cryptographic operations without idle time for randomization or reordering.
3Ease of manufacture
If fixed processing order is used, then implementation simplicity is maintained, but security against differential power analysis decreases
Solution Approach 1:
The patent changes the parameter of processing order from fixed to random variable. This parameter change is implemented through simple random number generation and buffer indexing logic, maintaining implementation simplicity while fundamentally altering the processing behavior to resist side-channel attacks.
Data Source
AI summary
A cryptographic accelerator (processor) retrieves data blocks for processing from a memory. These data blocks arrive and are stored in an input buffer in the order they were stored in memory (or other known order)—typically sequentially according to memory address (i.e., in-order.) The processor waits until a certain number of data blocks are available in the input buffer and then randomly selects blocks from the input buffer for processing. This randomizes the processing order of the data blocks. The processing order of data blocks may be randomized within sets of data blocks associated with a single read transaction, or across sets of data blocks associated with multiple read transactions.