Cryptographic Circuit Non-Binary Modular Arithmetic Cloning Resistance
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Solution Overview
Problem
Existing cryptographic access devices, such as IC cards, are vulnerable to cloning after the secret key is discovered, as fraudsters can emulate the cryptographic operations in software, which is not as secure as the hardware implementation.
Innovation Solution
The method and circuit slow down the execution time of software implementations of cryptographic operations by transforming binary input values into non-binary digits of base r, where r is greater than 2 and not a power of 2, and performing modulo r operations, making software emulation significantly slower than hardware implementation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If cryptographic operations are implemented in hardware, then security against cloning is improved, but device complexity increases
Solution Approach 1:
The patent changes the numerical base parameter from binary (base 2) to non-binary (base r where r > 2 and r is not a power of 2). This parameter change makes hardware implementation efficient while rendering software emulation impractically slow, thereby improving security without requiring complex hardware security modules or trusted execution environments.
Solution Approach 2:
The patent employs periodic modular operations (modular addition, subtraction, multiplication, and inverse operations) that create a rhythm of computation difficult to emulate in software. These periodic mathematical transformations with non-binary bases create timing patterns that are naturally fast in hardware but slow in software emulation.
2Device complexity
If cryptographic operations are implemented in software, then device complexity is reduced, but execution time increases
Solution Approach 1:
By changing the computational base from binary to non-binary (base r), the patent creates operations that are naturally suited for parallel hardware implementation but inefficient for sequential software processing. This parameter change alone causes software emulation to become impractically slow while hardware implementation remains fast.
Solution Approach 2:
The patent replaces standard binary arithmetic operations with non-binary modular operations. This substitution fundamentally changes the computational mechanics, making the operations inefficient in software while maintaining efficiency in hardware through dedicated circuitry designed for these specific non-binary modular operations.
3Productivity
If non-binary modular operations are performed, then software emulation speed is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The patent segments the cryptographic operation into distinct modular steps (modular addition, subtraction, multiplication, and inverse operations) that can be implemented as separate hardware circuits. This segmentation allows each operation to be optimized independently, reducing the cumulative manufacturing precision requirements while maintaining overall system security.
Solution Approach 2:
The patent uses modular operations with non-binary bases where the modulus r is chosen to be larger than necessary for minimal security. This excessive action in terms of mathematical complexity ensures that even with manufacturing variations, the security margin is maintained while software emulation remains impractically slow.
Data Source
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Figure 3B~6
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AI summary
The invention concerns a method of performing a cryptographic operation comprising: receiving a plurality of binary input values (P 0 ...P N ); splitting said binary input values into a plurality of non-binary digits (P 0 '...P M ') of base r, where r is an integer greater than 2 and not equal to a power of 2; and performing, by a cryptographic block (306) on each of the plurality of non-binary digits, a different modulo r operation to generate at least one output digit (Z 0 '...Z M ') of base r.