Crypto-Engine Hardware Resource Sharing for RSA ECC Processing
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Solution Overview
Problem
Existing hardware architectures for RSA and ECC cryptographic processing lack the ability to share and reuse resources, leading to inefficient execution of these algorithms.
Innovation Solution
A hardware-based crypto-engine with a modular arithmetic unit and interface controller that operates as a coprocessor, capable of executing both RSA and ECC algorithms, utilizing shared resources for modular multiplication and addition operations, and managing communication between the arithmetic unit and host processor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate hardware architectures are used for RSA and ECC algorithms, then each algorithm can be implemented with dedicated resources, but resource sharing and reuse between algorithms is not possible
Solution Approach 1:
The patent implements a universal hardware architecture that can execute both RSA and ECC algorithms using the same physical resources. The arithmetic unit is designed with configurable components that can be dynamically allocated to different algorithms through control logic, allowing multiplication units, addition units, and memory structures to serve multiple cryptographic purposes without requiring separate dedicated hardware for each algorithm
2Speed
If hardware architectures are used to implement RSA and ECC algorithms, then computational speed is improved, but resource reuse between algorithms is prevented
Solution Approach 1:
The patent merges the hardware resources for RSA and ECC implementations into a single integrated arithmetic unit. By combining multiplication units, addition units, subtraction units, and memory structures into one shared hardware platform with unified control logic, the design eliminates resource duplication while maintaining the high-speed computational capabilities needed for both cryptographic algorithms
3Productivity
If dedicated hardware resources are allocated for each cryptographic algorithm, then algorithm execution is optimized, but hardware resource efficiency decreases
Solution Approach 1:
The patent employs dynamic resource allocation where the hardware arithmetic unit can reconfigure itself between different cryptographic operations. Control logic dynamically assigns multiplication units, addition units, and memory resources to either RSA or ECC algorithms based on the current computational task, enabling the same physical hardware to adapt its configuration and maintain high execution efficiency for different algorithms without wasting resources
Data Source
AI summary
A crypto-engine for cryptographic processing has an arithmetic unit and an interface controller for managing communications between the arithmetic unit and a host processor. The arithmetic unit has a memory unit for storing and loading data and arithmetic units for performing arithmetic operations on the data. The memory and arithmetic units are controlled by an arithmetic controller.