Cryptographic Unit Failure Recognition via Parity Signal Comparison
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing cryptographic methods, such as the Advanced Encryption Standard (AES), are vulnerable to errors during encryption and decryption, which can lead to data corruption and potential exposure of sensitive information, and existing error recognition methods are either complex or not easily applicable to complex algorithms like AES.
Innovation Solution
A method and apparatus for recognizing failures in cryptographic units by determining input and output control signals through encryption of signal parities using an encryption number, allowing for error detection without revealing information about the data processed, utilizing simple circuit engineering and low-cost security measures like shift registers and XOR/XNOR gates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If parity code methods are used for error recognition in cryptographic units, then error detection capability is improved, but device complexity increases due to additional circuit components
Solution Approach 1:
The patent extracts only the essential parity information from the cryptographic processing by using separate parity input and output signals. Instead of monitoring all data bits, it focuses solely on parity bits, which are extracted and processed independently through the cryptographic unit. This reduction to essential elements maintains error detection capability while minimizing circuit complexity.
Solution Approach 2:
The patent introduces an intermediary evaluation device that receives both the parity input signal and parity output signal, along with an expected parity value. This intermediary component performs the comparison and error detection function, separating the error recognition logic from the cryptographic processing itself. This mediation allows the cryptographic unit to remain simple while the evaluation device handles the complexity of error detection.
2Reliability
If comprehensive error recognition is implemented in cryptographic units, then reliability is improved, but loss of information increases due to potential exposure of sensitive data through error signals
Solution Approach 1:
The patent extracts only parity information from the cryptographic processing, separating it from the sensitive plaintext and ciphertext data. By focusing error detection solely on parity bits rather than the full data stream, the system maintains comprehensive error recognition capability while preventing exposure of sensitive information that would be present in complete data monitoring approaches.
Solution Approach 2:
The patent applies different quality requirements to different parts of the cryptographic system. The parity input and output signals are processed with full error detection rigor, while the main sensitive data paths maintain their cryptographic security properties. This localized approach to error recognition ensures reliability where needed without compromising the security and information confidentiality of the main cryptographic operations.
3Ease of manufacture
If simple error detection methods are used, then ease of manufacture is improved, but measurement precision deteriorates in detecting subtle cryptographic errors
Solution Approach 1:
The patent enables the cryptographic unit to perform self-verification by comparing the parity output signal against the expected parity value derived from the parity input signal. The system uses its own parity information to detect errors, eliminating the need for external complex verification mechanisms. This self-service approach maintains implementation simplicity while achieving precise error detection through the cryptographic unit's inherent processing capabilities.
Solution Approach 2:
The patent implements a feedback mechanism where the parity output signal is fed back to the evaluation device, which compares it with the expected parity value. This feedback loop provides continuous error detection capability, allowing the system to precisely identify errors while maintaining simple circuit implementation. The feedback approach enables precise error detection without requiring complex forward-error-correction or redundant encoding schemes.
Data Source
AI summary
An apparatus for recognizing a failure in a cryptographic unit, wherein the cryptographic unit includes a determinator for determining an input control signal and an output control signal, with the determinator being formed to determine the input control signal on the basis of an encryption of an input control signal parity of a group of input signals or an input signal of the group of input signals with an encryption number and to determine the output control signal on the basis of an encryption of an output control signal parity of a group of the output signals or an output signal of the group of output signals with the encryption number. Furthermore, the apparatus for recognizing includes an evaluator for evaluating the input control signal and the output control signal to recognize a failure of the cryptographic unit on the basis of a comparison between the input control signal and the output control signal.