Cryptographic Processor Circuit Camouflage for Reverse Engineering Resistance
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Solution Overview
Problem
Reverse engineering of integrated circuits poses a significant threat to the semiconductor industry, as attackers can steal and replicate circuit designs, and existing methods to thwart this are either costly, time-consuming, or compromise cryptographic security.
Innovation Solution
Implementing a cryptographic processor with a processing circuit that performs an iterated cryptographic algorithm, a controller to apply multiple iterations, and a transformation circuit using circuit camouflage techniques to hinder reverse engineering, by adding transformations to encryption or decryption blocks and key scheduling processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If circuit camouflage techniques are applied to protect cryptographic algorithms, then reverse engineering resistance is improved, but device complexity increases
Solution Approach 1:
The patent introduces a transformation circuit as an intermediary component between the cryptographic processing circuit and the external interface. This transformation circuit applies circuit camouflage techniques by inserting dummy circuits and transforming the appearance of critical cryptographic operations, thereby protecting the core algorithm without fundamentally redesigning the entire system architecture.
Solution Approach 2:
The cryptographic processor is divided into distinct functional modules: a cryptographic processing circuit for core operations, a transformation circuit for camouflage operations, and a controller for coordination. This segmentation allows the camouflage functionality to be added as a separate layer without complicating the core cryptographic logic.
2Reliability
If multiple iterations of round function are applied, then cryptographic security is improved, but processing time increases
Solution Approach 1:
The transformation circuit performs preliminary camouflage transformations on the input message before it enters the iterative round function processing. By pre-processing and camouflaging the input, the system reduces the effective processing time required for each iteration while maintaining the security benefits of multiple iterations through the controller's coordination of the cryptographic operations.
Data Source
AI summary
A cryptographic processor is described comprising a processing circuit configured to perform a round function of an iterated cryptographic algorithm, a controller configured to control the processing circuit to apply a plurality of iterations of the round function on a message to process the message in accordance with the iterated cryptographic algorithm and a transformation circuit configured to transform the input of a second iteration of the round function following a first iteration of the round function of the plurality of iterations and to supply the transformed input as input to the second iteration wherein the transformation circuit is implemented using a circuit camouflage technique.


