Microprocessor Cryptography Unit Atomic Instruction

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Solution Overview

Problem

Current computer systems face inefficiencies in performing cryptographic operations due to the need for multiple instances of encryption/decryption applications, slow software-based implementations, and operating system intervention, which leads to processing delays and increased system resource usage.

Innovation Solution

A microprocessor with a dedicated cryptography unit that performs cryptographic operations via a single atomic instruction, reducing the need for operating system intervention and enabling faster, more efficient encryption and decryption processes compatible with existing architectures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If software-based cryptographic implementations are used, then system compatibility and ease of implementation are improved, but processing speed and efficiency deteriorate

Engineering Contradiction:
Improveease of implementationVSAvoidprocessing speed
Core Design Contradiction:
Ease of operationVSSpeed

Solution Approach 1:

The patent replaces software-based cryptographic implementations with a dedicated hardware cryptography unit that executes cryptographic operations through specialized circuitry. This hardware accelerator is integrated into the microprocessor and can be triggered by specific instructions (e.g., XORKEY, ENCRYPT, DECRYPT) to perform encryption and decryption operations much faster than software implementations, while maintaining compatibility with existing software applications through the instruction set interface.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Adaptability or versatility

If multiple instances of encryption/decryption applications are used, then functional versatility is improved, but system complexity and resource usage deteriorate

Engineering Contradiction:
Improvefunctional versatilityVSAvoidsystem complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements a universal cryptography unit that can perform multiple cryptographic functions (encryption, decryption, key generation, key scheduling) through a single integrated hardware component. The unit supports various cryptographic algorithms and modes of operation and can be invoked by different instructions depending on the operation required, eliminating the need for separate application instances for each cryptographic function while maintaining full functional versatility.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If operating system intervention is required for cryptographic operations, then system control and security are improved, but processing time and efficiency deteriorate

Engineering Contradiction:
Improvesystem controlVSAvoidprocessing delays
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent enables the microprocessor to perform cryptographic operations autonomously through dedicated hardware instructions that directly activate the cryptography unit without requiring operating system intervention. The instructions (e.g., XORKEY, ENCRYPT, DECRYPT) are executed directly by the processor, triggering the hardware accelerator to complete cryptographic operations independently, thereby eliminating the time delays associated with OS context switching and system calls while maintaining security through hardware-level protection.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS7900055B2Microprocessor apparatus and method for employing configurable block cipher cryptographic algorithms
Publication Date: 2011.03.01 VIA TECH INC
  • US7900055B2 patent drawing
  • US7900055B2 patent drawing
  • US7900055B2 patent drawing

AI summary

An apparatus for performing cryptographic operations. The apparatus includes an x86-compatible microprocessor that has fetch logic, algorithm logic, and execution logic. The fetch logic is configured to receive a single, atomic cryptographic instruction as one of the instructions in an application program executing on the x86-compatible microprocessor. The single, atomic cryptographic instruction prescribes an encryption operation and one of a plurality of cryptographic algorithms. The algorithm logic is operatively coupled to the single, atomic cryptographic instruction. The algorithm logic directs the x86-compatible microprocessor to execute the encryption operation according to the one of a plurality of cryptographic algorithms. The execution logic is operatively coupled to the algorithm logic. The execution logic executes the encryption operation. The execution logic includes a cryptography unit for executing a plurality of cryptographic rounds required to complete the encryption operation.