Cryptographic ASIC with Onboard OTP Memory for Blockchain Security
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current cryptographic integrated circuits lack flexibility and security in implementing proof-of-work calculations and managing information streams, particularly in blockchain technology, due to limitations in programmability and secure key management.
Innovation Solution
The design of a transform-enabled cryptographic ASIC with a programmable transformation function and one-time programmable memory that derives a transform key from a user passphrase, allowing for customizable hashing and secure storage and verification of information streams, while preventing external access to configuration data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a cryptographic ASIC uses fixed hardwired logic for cryptographic operations, then computational speed is improved, but flexibility and adaptability deteriorate
Solution Approach 1:
The patent implements a hybrid architecture where the cryptographic core uses fixed hardwired logic for high-speed operations, while the transformation function is implemented as reconfigurable logic that can be dynamically programmed. This allows the system to maintain high computational speed for core cryptographic operations while gaining flexibility through programmable transformation functions that can be customized for different applications.
Solution Approach 2:
The cryptographic ASIC is divided into distinct functional segments: a fixed cryptographic core for high-speed operations and a separate reconfigurable transformation block for flexible operations. This segmentation allows each part to be optimized independently - the core for speed and the transformation block for adaptability - while working together as an integrated system.
2Ease of operation
If configuration data is stored in externally accessible memory, then ease of programming is improved, but security deteriorates due to potential external access
Solution Approach 1:
The configuration data is programmed into the reconfigurable logic during the manufacturing process or before deployment, rather than being stored in externally accessible memory. This preliminary action ensures that the transformation functions are fixed and secure, while still allowing the system to be programmed for different applications through the reconfigurable architecture.
Solution Approach 2:
The reconfigurable logic acts as an intermediary between the external programming interface and the internal cryptographic operations. It allows the system to be programmed externally while protecting the configuration data from direct external access, as the programmed functions are embedded in the logic fabric rather than stored in accessible memory.
3Adaptability or versatility
If transformation functions are implemented in reconfigurable logic, then adaptability is improved, but device complexity increases
Solution Approach 1:
The patent merges the fixed cryptographic core with the reconfigurable transformation block into a single integrated ASIC device. This combination allows the system to achieve both high performance from the fixed core and flexibility from the reconfigurable block without the complexity of coordinating separate external components. The integration reduces overall system complexity while maintaining adaptability.
Data Source
Figure 1
Figure 2
Figure 3
AI summary
A cryptographic ASIC and method for autonomously storing data into a one-time programmable memory in isolation. Internal circuitry provides programming pulses of a given voltage magnitude and duration for changing the state of selected memory elements. Use of internal circuitry reduces pin count and increases reliability and security over devices relying on external circuitry to provide programming pulses. In one embodiment, the stored data comprises cryptographic data for enforcing a derivative key hierarchy for managing an information stream, such as a blockchain.