Cryptographic Circuit Block Permutation for Side-Channel Attack Mitigation
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Solution Overview
Problem
IoT devices with cryptographic circuits using block ciphers like AES are vulnerable to side-channel attacks, where attackers can determine secret keys by measuring power consumption or electromagnetic radiation, compromising security and privacy.
Innovation Solution
Implementing an integrated circuit with a cryptographic circuit that performs cryptographic operations in a block cipher AES mode without feedback, using internally permuted sequential data block orders to mitigate side-channel attacks, generated using random number generators or pre-configured permutated orders, ensuring that power traces do not match observable plaintext or ciphertext blocks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If block cipher operations are performed on sequential data blocks in standard order, then cryptographic processing is simple and efficient, but the device becomes vulnerable to side-channel attacks where attackers can associate power traces with specific data blocks to extract secret keys
Solution Approach 1:
The patent applies dynamics by making the block processing order variable rather than fixed. A permutation index is generated dynamically (either randomly or based on counter values) to determine the processing sequence of data blocks. This dynamic reordering ensures that the same plaintext blocks are processed in different orders across multiple encryption operations, preventing attackers from consistently associating power traces with specific data blocks or positions, thereby mitigating side-channel attacks while maintaining cryptographic functionality
Solution Approach 2:
The patent implements preliminary action by pre-generating permutation indices before the actual encryption process. These permutation indices are stored or generated in advance to determine the processing order of data blocks. By preparing the permutation sequence beforehand, the system establishes a protective layer against side-channel attacks before the cryptographic operation begins, ensuring that power consumption patterns cannot be reliably correlated with specific data block positions during the encryption process
2Reliability
If feedback mechanisms are implemented in block cipher modes (such as AES-CBC), then cryptographic security is enhanced through inter-block dependencies, but the complexity of the cryptographic circuit increases and may introduce additional side-channel vulnerability vectors
Solution Approach 1:
The patent applies segmentation by dividing the cryptographic processing into independent stages: a permutation stage that reorders data blocks according to generated indices, and an encryption stage that processes the permuted blocks. This segmentation separates the security-enhancing permutation function from the core encryption function, allowing each to be optimized independently. The segmentation reduces circuit complexity by avoiding the need for complex feedback mechanisms while maintaining security through the added layer of obfuscation against side-channel attacks
Data Source
AI summary
Systems and methods are disclosed for side-channel attack mitigation for secure devices including cryptographic circuits using block ciphers that are not based upon feedback. For disclosed embodiments, an integrated circuit includes a cryptographic circuit and a controller. The cryptographic circuit performs cryptographic operations in a block cipher AES mode without feedback. The controller outputs control signals to the cryptographic circuit that cause the cryptographic circuit to perform the cryptographic operations on sequential data blocks with an internally permuted order to mitigate block cipher side-channel attacks. The internally permuted order can be generated using one or more random number generators, one or more pre-configured permutated orders, or other techniques. Further, sequential data blocks can be grouped into sequential subsets of data blocks, and the cryptographic operations can be performed in sequence for the subsets with data blocks within each subset being processed with an internally permuted order.