Private-Key Compression for Faster Cryptographic Hardware Tests

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Solution Overview

Problem

Existing manufacturing tests for electronic devices with cryptographic algorithms, such as elliptic curve cryptography and symmetric cryptography, are lengthy and costly due to the need for extensive node exercise, leading to increased manufacturing costs.

Innovation Solution

Implement a private key compression mechanism and reduced round functionality for cryptographic algorithms, allowing fast and reliable testability by using a compressed private key or reduced number of rounds in the functional test.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional functional test with full private key is used, then high fault coverage is achieved, but test time becomes excessively long

Engineering Contradiction:
Improvefault coverageVSAvoidtest time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies partial action by using a compressed private key that contains only a portion of the bits from the original private key. This compressed key is sufficient to exercise the cryptographic circuit nodes for fault detection, eliminating the need to process all original key bits while maintaining adequate test coverage.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The patent changes the parameter of private key length by compressing it from its original full length to a shorter compressed form. This parameter change reduces the number of processing steps required during testing while preserving the essential functionality needed for fault detection in the cryptographic circuit.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If structural scan test is used, then high fault coverage is achieved, but chip area and manufacturing cost increase significantly

Engineering Contradiction:
Improvefault coverageVSAvoidchip area
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the essential testing functionality from the complex structural scan test approach. By using a compressed private key with functional test, it separates the core fault detection capability from the extensive additional circuitry required by traditional structural scan methods, achieving similar reliability without the area penalty.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent creates a simplified version of the private key (compressed form) that replicates the essential testing function of the full private key. This compressed copy maintains the necessary cryptographic operations for fault detection while requiring minimal additional circuit implementation.

Inventive Principle:
Principle #26Copying

3Reliability

If conventional functional test with full private key is used, then comprehensive node exercise is achieved, but manufacturing cost increases due to extended test time

Engineering Contradiction:
Improvenode exercise coverageVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent applies partial action by processing only the compressed portion of the private key during manufacturing test. This partial processing achieves sufficient node exercise for quality assurance while dramatically reducing the test time that contributes to manufacturing costs.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The patent changes the time parameter of the testing process by reducing private key length through compression. This parameter change directly reduces the number of operational cycles required during manufacturing test, thereby lowering the time-based cost component while maintaining adequate coverage.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP4618472A1Device for testing a cryptographic algorithm hardware
Publication Date: 2025.09.17 NXP BV
  • EP4618472A1 patent drawingFigure 1
  • EP4618472A1 patent drawingFigure 2
  • EP4618472A1 patent drawingFigure 3

AI summary

There is described a device (100) for testing an electronic device (110), wherein the electronic device (110) comprises a cryptographic algorithm, and wherein the cryptographic algorithm is a repetitive cryptographic algorithm, the device (100) comprising a private key compression functionality (120), configured to compress a private key used to perform the cryptographic algorithm, and a test functionality, configured to perform or trigger the performance of the cryptographic algorithm by the electronic device (110) using the compressed private key.