Cryptographic Processing Instructions Using XMM Registers
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current cryptographic processing techniques, such as those based on the Advanced Encryption Standard (AES), are computationally intensive and can lead to processing bottlenecks, slowing down security applications and potentially leaking cryptographic keys due to timing-related vulnerabilities.
Innovation Solution
New computer-executable instructions that combine multiple operations into efficient, fixed-timing memory access using 128-bit XMM registers, providing dedicated memory usage to prevent interruptions and maintain constant access times, thus enhancing cryptographic processing speed and security.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional cryptographic processing instructions are used, then cryptographic operations can be performed, but processing speed is slow and computational overhead is high
Solution Approach 1:
The patent combines multiple separate cryptographic operations (substitution, permutation, key mixing) into single integrated instructions that execute atomically. This merging eliminates the overhead of multiple instruction sequences and intermediate storage operations, directly improving processing speed and reducing time consumption.
Solution Approach 2:
The patent segments cryptographic processing into distinct operational phases (substitution layer, permutation layer, key mixing layer) that can be executed efficiently within unified instructions. This segmentation allows each phase to be optimized independently while maintaining overall processing efficiency.
2Reliability
If variable-timing memory access is used in cryptographic processing, then flexible data access is possible, but timing information can leak cryptographic keys
Solution Approach 1:
The patent implements fixed-timing memory access mechanisms where all memory operations are executed in predetermined time slots regardless of actual data readiness. This equipotential approach ensures that timing observations cannot reveal information about cryptographic keys while maintaining the flexibility needed for cryptographic operations through buffer management and scheduling.
3Productivity
If shared memory resources are used, then resource utilization is improved, but processing threads can be interrupted causing delays
Solution Approach 1:
The patent extracts cryptographic processing operations into dedicated execution contexts with isolated memory resources and protected execution environments. This extraction prevents interruptions from other processing threads while maintaining efficient resource utilization through controlled sharing of non-critical resources outside the cryptographic execution context.
Data Source
AI summary
Executable instructions designed to provide faster cryptographic processing, fixed-timing memory access, and dedicated memory usage are implementable on an x86 CPU utilizing XMM registers. The instructions can be utilized to implement cryptographic processing in accordance with the Advanced Encryption Standard (AES). To encrypt, a single instruction performs nonlinear transformation, rotation, and linear transformation. Another single instruction used during encryption performs nonlinear transformation and rotation. New instructions also are implemented to perform decryption. The instructions implemented to perform decryption perform the mathematical inverse functions of their counterparts used for encryption.