Crystal Oscillator Bias Reset Window for Lower Phase Noise
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Solution Overview
Problem
Existing crystal oscillators face challenges in reducing phase noise of the reference clock without introducing side effects, which affects the overall performance of electronic systems.
Innovation Solution
A crystal oscillator design that includes a crystal oscillator core circuit, a first bias circuit, and a phase noise reduction circuit, where the phase noise reduction circuit resets the bias voltage of the sinusoidal wave when it exceeds a specific voltage range, determined by a second bias circuit, to minimize phase noise without requiring calibration of the reset operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional circuits are added to reduce phase noise of the crystal oscillator, then phase noise performance is improved, but device complexity increases
Solution Approach 1:
The patent merges the phase noise reduction function with the existing bias circuit by adding a reset switch that resets the bias voltage to its initial value. This combines the biasing function and phase noise reduction function into a single integrated circuit structure, avoiding the need for separate additional circuits and thereby reducing device complexity while maintaining improved phase noise performance.
2Measurement precision
If calibration is performed to optimize phase noise reduction, then measurement precision is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent implements a self-service mechanism where the reset switch automatically resets the bias voltage to its initial value without requiring external calibration or adjustment. The circuit self-regulates the bias voltage level, eliminating the need for precise timing calibration during manufacturing and reducing manufacturing precision requirements while maintaining measurement precision.
Data Source
AI summary
A crystal oscillator and a phase noise reduction method thereof are provided. The crystal oscillator may include a crystal oscillator core circuit, a first bias circuit and a phase noise reduction circuit, the first bias circuit is coupled to an output terminal of the crystal oscillator core circuit, and the phase noise reduction circuit is coupled to the output terminal of the crystal oscillator core circuit. In operations of the crystal oscillator, the crystal oscillator core circuit is configured to generate a sinusoidal wave. The first bias circuit is configured to provide a first voltage level to be a bias voltage of the sinusoidal wave. The phase noise reduction circuit is configured to reset the bias voltage of the sinusoidal wave in response to a voltage level of the sinusoidal wave exceeding a specific voltage range. For example, the specific voltage range is determined according to a second voltage level.


