Crystal Oscillator Duty Cycle Tuning With Low Power Buffering
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Solution Overview
Problem
Conventional crystal oscillators, such as Pierce oscillators, require significant integrated circuit area and high current consumption due to large external components and parasitic capacitance, and struggle with duty cycle adjustment, leading to inefficiencies in digital clock signal generation.
Innovation Solution
The proposed solution involves a crystal oscillator circuit with an integrated voltage shifting circuit using a tunable capacitor and diode-connected NMOS transistors to adjust the DC offset voltage, allowing for variable duty cycle without affecting oscillator parameters, and utilizing a hysteresis buffer to generate a square wave with low power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional Pierce oscillator is used with external crystal and tank capacitors, then the oscillator can generate stable clock signals, but it requires large integrated circuit area and consumes high current
Solution Approach 1:
The patent merges the crystal oscillator and duty cycle adjustment functions into a single integrated circuit. The oscillator circuit includes a crystal element, capacitors, and an inverter with a feedback resistor that is integrated on-chip, eliminating the need for external components. This consolidation reduces the overall circuit area while maintaining oscillation stability through the integrated design.
Solution Approach 2:
The patent introduces a dynamic duty cycle adjustment mechanism that allows the oscillator to adapt its output waveform characteristics without affecting the oscillation frequency or stability. The adjustable duty cycle feature enables the circuit to optimize its performance for different loading conditions and application requirements, making the oscillator more versatile while maintaining compact integration.
2Reliability
If a conventional Pierce oscillator is used with external crystal and tank capacitors, then the oscillator can generate stable clock signals, but it consumes high current
Solution Approach 1:
The patent merges the crystal oscillator and duty cycle adjustment functions into a single integrated circuit. The oscillator circuit includes a crystal element, capacitors, and an inverter with a feedback resistor that is integrated on-chip, eliminating the need for external components. This consolidation reduces the overall circuit area while maintaining oscillation stability through the integrated design.
Solution Approach 2:
The patent introduces a dynamic duty cycle adjustment mechanism that allows the oscillator to adapt its output waveform characteristics without affecting the oscillation frequency or stability. The adjustable duty cycle feature enables the circuit to optimize its performance for different loading conditions and application requirements, making the oscillator more versatile while maintaining compact integration.
3Productivity
If a conventional oscillator is used, then it can generate clock signals, but it lacks duty cycle adjustment capability
Solution Approach 1:
The patent designs the oscillator circuit to perform multiple functions: it generates stable clock signals through the crystal oscillator while simultaneously providing adjustable duty cycle control. The inverter with feedback resistor configuration enables both oscillation and duty cycle adjustment, making the circuit versatile for different application requirements without needing separate circuits.
Solution Approach 2:
The patent introduces a dynamic duty cycle adjustment mechanism that allows the oscillator to adapt its output waveform characteristics without affecting the oscillation frequency or stability. The adjustable duty cycle feature enables the circuit to optimize its performance for different loading conditions and application requirements, making the oscillator more versatile while maintaining compact integration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces chip area usage and power consumption while enabling adjustable duty cycle for digital clock signals, maintaining low bias current and efficient operation.
Implementation Method 1
Many oscillators are built on crystal references formed using piezoelectric quartz crystals. The crystal's physical size and properties are used to establish oscillation at a desired frequency.
Implementation Method 2
For digital timing references, sinusoidal waveforms are converted into digital signals using hysteresis buffers.
Data Source
AI summary
An oscillator includes first and second capacitors, an inverter, a voltage shifting circuit, and a hysteresis buffer. The first and second capacitors have first terminals adapted to be coupled to respective first and second nodes, and second terminals coupled to ground. The inverter has an input coupled to the first node, and an output coupled to the second node. The voltage shifting circuit is coupled to the first and second nodes and has an input for receiving a tuning signal. The voltage shifting circuit changes an average voltage at the first node according to the tuning signal when an oscillation occurs in response to a crystal being coupled between the first and second nodes. The hysteresis buffer has an input coupled to one of first node and the second node, and an output for providing a clock signal having a duty cycle responsive to the tuning signal.