Crystal Oscillator Interface With Voltage Limiting for Oxide Overstress

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Solution Overview

Problem

Low-voltage transistors used in microelectronic devices often fail due to oxide overstress when interfacing with high-voltage circuits, as the thinner gate oxide layers cannot withstand higher voltages, leading to potential damage in applications like network processor chips.

Innovation Solution

Incorporating a set of voltage limiter transistors and a set of transistors providing a constant current path within the oscillator circuit to limit voltage levels and reduce overshoot/undershoot, ensuring that the gate-source and gate-drain voltages of low-voltage transistors remain within their tolerance levels, even when interfacing with higher voltage signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If low-voltage transistors are used in the oscillator circuit, then device size is reduced and manufacturing cost is lowered, but the transistors become vulnerable to oxide overstress when interfacing with high-voltage circuits

Engineering Contradiction:
Improvemanufacturing costVSAvoidoxide overstress resistance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent introduces voltage limiter transistors (first and second voltage limiter transistors) as intermediary components between the high-voltage crystal interface and the low-voltage oscillator circuit. These limiter transistors act as protective mediators that clamp the voltage to safe levels, preventing direct exposure of vulnerable low-voltage transistors to high-voltage stress while enabling continued use of cost-effective low-voltage technology

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If the gate oxide thickness is reduced to shrink device size, then transistor density and integration are improved, but the maximum withstand voltage of the transistors decreases

Engineering Contradiction:
Improvedevice densityVSAvoidvoltage withstand capability
Core Design Contradiction:
ProductivityVSStrength

Solution Approach 1:

The patent implements protective voltage limiter circuits that are activated beforehand to cushion against voltage spikes before they can damage the thin gate oxide. The limiter transistors are positioned to preemptively clamp any excessive voltage from the high-voltage crystal interface, providing a safety buffer that allows aggressive scaling of gate oxide thickness for higher density without proportionally increasing vulnerability

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Adaptability or versatility

If low-voltage transistors interface with high-voltage crystal signals, then circuit compatibility is achieved, but voltage overshoot and undershoot cause transistor damage

Engineering Contradiction:
Improvevoltage level compatibilityVSAvoidvoltage overshoot/undershoot
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The patent employs feedback mechanisms through the voltage limiter transistors that continuously monitor and respond to voltage conditions at the crystal interface. When voltage overshoot or undershoot occurs, the limiter transistors automatically activate to clamp the voltage within safe bounds, providing real-time feedback control that maintains compatibility between high-voltage crystal signals and low-voltage transistor operation while eliminating harmful voltage excursions

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS7471163B2Oxide overstress tolerant crystal oscillator
Publication Date: 2008.12.30 INTEL CORP
  • US7471163B2 patent drawing
  • US7471163B2 patent drawing
  • US7471163B2 patent drawing

AI summary

An oscillator circuit includes a plurality of transistors that can withstand relatively low gate-to-source and gate-to-drain voltages. The oscillator circuit interfaces with an oscillator that oscillates at a relatively high voltage. The oscillator circuit includes a first set of transistors coupled to an input voltage and an output voltage of the oscillator, the input voltage oscillating in a range exceeding a tolerance voltage level of each transistor of the first set of transistors. The oscillator circuit also includes a second set of transistors to limit a voltage level in the first set of transistors. The oscillator circuit further includes a third set of transistors to provide a constant current path for the second set of transistors, independent of a switching state of each transistor of the first set of transistors.