Crystalline Semiconductor Layer for Bipolar-FET SOI Integration
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Solution Overview
Problem
Efficient integration of lateral bipolar transistors into the same device layer as field effect transistors in semiconductor-on-insulator structures is a technical challenge.
Innovation Solution
A structure is provided with a dielectric layer on a back-gate semiconductor layer, featuring a bipolar transistor structure, a field effect transistor structure, and a crystalline semiconductor layer between them, allowing for shared terminals and simultaneous back-gate biasing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If lateral bipolar transistors are integrated into the same device layer as field effect transistors, then device functionality and performance are improved, but manufacturing complexity and integration difficulty increase
Solution Approach 1:
The patent merges bipolar and FET transistor structures into a single integrated device layer, sharing common components such as the crystalline semiconductor layer, dielectric layers, and back-gate structure. This combining approach enables both transistor types to coexist and function simultaneously within the same device architecture, improving overall device functionality while managing integration complexity through shared structural elements.
Solution Approach 2:
The integrated structure employs universal components that serve multiple functions: the crystalline semiconductor layer acts as the active region for both bipolar and FET transistors, the dielectric layers provide both electrical isolation and structural support, and the back-gate structure enables control for both transistor types. This multi-functionality reduces the need for separate dedicated structures for each transistor type.
2Ease of manufacture
If separate structures are used for bipolar and field effect transistors, then manufacturing process simplicity is maintained, but device area and power consumption increase
Solution Approach 1:
The patent combines bipolar and FET transistor structures into a single integrated device layer, sharing common components such as the crystalline semiconductor layer, dielectric layers, and back-gate structure. This combining approach enables both transistor types to coexist and function simultaneously within the same device architecture, improving overall device functionality while managing integration complexity through shared structural elements.
Solution Approach 2:
The integrated structure employs universal components that serve multiple functions: the crystalline semiconductor layer acts as the active region for both bipolar and FET transistors, the dielectric layers provide both electrical isolation and structural support, and the back-gate structure enables control for both transistor types. This multi-functionality reduces the need for separate dedicated structures for each transistor type.
3Ease of manufacture
If separate structures are used for bipolar and field effect transistors, then manufacturing process simplicity is maintained, but power consumption increases
Solution Approach 1:
The patent combines bipolar and FET transistor structures into a single integrated device layer, sharing common components such as the crystalline semiconductor layer, dielectric layers, and back-gate structure. This combining approach enables both transistor types to coexist and function simultaneously within the same device architecture, improving overall device functionality while managing integration complexity through shared structural elements.
Solution Approach 2:
The integrated structure employs universal components that serve multiple functions: the crystalline semiconductor layer acts as the active region for both bipolar and FET transistors, the dielectric layers provide both electrical isolation and structural support, and the back-gate structure enables control for both transistor types. This multi-functionality reduces the need for separate dedicated structures for each transistor type.
4Reliability
If vertical heterojunction bipolar transistors are used, then transistor performance is achieved, but integration into CMOS process flows and semiconductor-on-insulator structures is difficult
Solution Approach 1:
The patent inverts the conventional vertical orientation of bipolar transistors by implementing a lateral configuration where the current flow path is horizontal rather than vertical. This inversion allows the bipolar transistor structure to be integrated into the same planar device layer as FETs, enabling compatibility with standard CMOS process flows and semiconductor-on-insulator substrates while maintaining transistor functionality through the lateral heterojunction design.
Data Source
AI summary
Embodiments of the disclosure provide a crystalline semiconductor layer between a bipolar transistor structure and a field effect transistor (FET) structure. The structure includes a dielectric layer on a back-gate semiconductor layer, a bipolar transistor structure on the dielectric layer, FET structure on the dielectric layer, and a crystalline semiconductor layer on the dielectric layer between the bipolar transistor structure and the FET structure. The crystalline semiconductor layer includes a terminal of the bipolar transistor structure and a terminal of the FET structure.