Crystalline Semiconductor Layer via MgO Seed in BEOL Processing

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Solution Overview

Problem

Forming a crystalline semiconductor layer over an amorphous dielectric layer, such as silicon oxide, is challenging due to the lack of a crystalline lattice link and the unsuitability of high-temperature annealing in back-end-of-line processes.

Innovation Solution

A crystalline dielectric seed layer, like magnesium oxide, is formed over an amorphous inter-layer dielectric layer, followed by a nanosecond laser anneal process to crystallize an amorphous semiconductor layer, enabling the growth of a crystalline semiconductor layer at low temperatures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If high-temperature annealing is used to crystallize the semiconductor layer, then crystalline structure is achieved, but the process temperature is too high for back-end-of-line processes

Engineering Contradiction:
Improvecrystalline structureVSAvoidprocess temperature
Core Design Contradiction:
Stability of the object's compositionVSTemperature

Solution Approach 1:

The patent changes the temperature parameter from high-temperature annealing (>500°C) to low-temperature crystallization (<450°C) by introducing a crystalline seed layer that enables crystal growth at lower temperatures, making the process suitable for back-end-of-line integration

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

A crystalline dielectric seed layer is introduced as an intermediary between the amorphous inter-layer dielectric and the amorphous semiconductor layer. This seed layer provides a crystalline template that facilitates low-temperature crystallization of the semiconductor layer without requiring high-temperature annealing

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If a crystalline semiconductor layer is formed over an amorphous dielectric layer, then device performance is improved, but the lack of crystalline lattice link prevents successful growth

Engineering Contradiction:
Improvedevice performanceVSAvoidlayer formation feasibility
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The crystalline dielectric seed layer serves as a mediator that provides the missing crystalline lattice link between the amorphous inter-layer dielectric and the semiconductor layer, enabling successful epitaxial growth without requiring the substrate itself to be crystalline

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The crystalline seed layer is formed in advance before depositing the semiconductor layer, preparing a ready-made crystalline template that will guide and facilitate the subsequent crystallization process when the semiconductor material is deposited

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method allows for the successful formation of crystalline semiconductor layers in back-end-of-line processes, improving device integration and performance by providing a crystalline lattice link and maintaining low processing temperatures.

Implementation Method 1

a nanosecond laser anneal process to crystallize an amorphous semiconductor layer

Methodology Applied
Scientific EffectLaser annealing: Laser

Implementation Method 2

crystallize an amorphous semiconductor layer, enabling the growth of a crystalline semiconductor layer

Methodology Applied
Scientific EffectCrystallization: Crystallisation

Implementation Method 3

A crystalline semiconductor layer is then formed over the base layer

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS12051702B2Crystalline semiconductor layer formed in BEOL processes
Publication Date: 2024.07.30 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12051702B2 patent drawing
  • US12051702B2 patent drawing
  • US12051702B2 patent drawing

AI summary

A crystalline channel layer of a semiconductor material is formed in a backend process over a crystalline dielectric seed layer. A crystalline magnesium oxide MgO is formed over an amorphous inter-layer dielectric layer. The crystalline MgO provides physical link to the formation of a crystalline semiconductor layer thereover.