Crystalline Silicon Oxide Passivation for Low-Temperature Silicon Surfaces

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Solution Overview

Problem

Conventional silicon substrate passivation methods result in amorphous silicon oxide layers with defect states, leading to deteriorated device performance and substrate degradation due to high processing temperatures.

Innovation Solution

A method involving the formation of a crystalline silicon oxide superstructure with a (1×1) plane structure using Wood's notation, achieved by heating the silicon substrate in a vacuum chamber and supplying molecular oxygen at controlled pressures and doses, followed by deposition of a dielectric capping layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If thermal oxide growth is used to passivate silicon surfaces, then surface passivation is achieved, but amorphous silicon oxide layers are formed leading to defect states

Engineering Contradiction:
Improvesurface passivation qualityVSAvoidoxide layer crystallinity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent changes the oxidation parameters by conducting oxidation in a vacuum environment (10^-6 to 10^-3 mbar) at controlled temperatures (200-500°C) with specific oxygen doses (0.1-1000 Langmuir), which transforms the oxidation process from producing amorphous layers to producing crystalline silicon oxide superstructures with (1×1) plane structure

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent induces a phase transition in the silicon oxide layer from amorphous to crystalline state by controlling the oxidation process in vacuum with specific temperature and oxygen dose parameters, resulting in a crystalline silicon oxide superstructure that eliminates defect states

Inventive Principle:
Principle #36Phase transitions

2Manufacturing precision

If high processing temperatures are used for oxidation, then oxide layer formation is achieved, but silicon substrate properties are deteriorated

Engineering Contradiction:
Improveoxide layer formationVSAvoidsubstrate degradation
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The patent changes the temperature parameter from conventional high-temperature oxidation (>900°C) to low-temperature oxidation (200-500°C) combined with vacuum environment and controlled oxygen dosing, enabling oxide formation without substrate degradation

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces the thermal field-dominated oxidation process with a combined vacuum-field and controlled chemical dosing approach, where oxidation occurs through controlled oxygen exposure in vacuum rather than through high thermal energy input

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The crystalline silicon oxide superstructure reduces surface defect density and improves interface quality, enhancing semiconductor device performance while maintaining lower processing temperatures.

Implementation Method 1

heating the silicon substrate to an oxidation temperature TO in a range from 100 to 530° C.

Methodology Applied
Scientific EffectHeating: Heating

Implementation Method 2

supplying molecular oxygen (O2) into the vacuum chamber with an oxidation pressure PO and an oxygen dose DO... the crystalline silicon oxide superstructure is formed on the deposition surface

Methodology Applied
Scientific EffectOxidation: Oxidation

Data Source

PatentUS12622188B2Semiconductor structure and method
Publication Date: 2026.05.05 SISUSEMI OY
  • US12622188B2 patent drawing
  • US12622188B2 patent drawing

AI summary

This disclosure relates to a semiconductor structure (100), comprising a crystalline silicon substrate (110), having a surface (111), and a crystalline silicon oxide superstructure (120) on the surface (111) of the silicon substrate (110), the silicon oxide superstructure (120) having a thickness of at least two molecular layers and a (1×1) plane structure using Wood's notation.