Crystallized 2D Channel Regions in GAA Semiconductor Devices
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Solution Overview
Problem
Conventional semiconductor devices struggle to meet performance requirements due to material supply constraints and limitations in using a wide array of materials while maintaining high device performance.
Innovation Solution
The implementation of semiconductor devices with crystallized channel regions using a 360-degree gate-all-around (GAA) process, which allows for the fabrication of a three-dimensional stack with two-dimensional (2D) materials, enabling a wider range of 2D materials to be used in the channel region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional semiconductor manufacturing processes are used, then device fabrication is straightforward with established materials, but device performance cannot meet increasing computational throughput requirements and material supply constraints limit material choices
Solution Approach 1:
The patent changes the crystalline state parameter of the channel region by introducing a crystallization step that transforms amorphous or semi-crystalline 2D materials into fully crystalline structures. This parameter change enables the use of diverse 2D materials (MoS2, WS2, MoSe2, WSe2, black phosphorus, InSe, In2Se3) while achieving high device performance and computational throughput that meets computational requirements
Solution Approach 2:
The patent employs composite material structures combining 2D materials with high-k dielectric materials (HfO2, Al2O3, TiO2, Ta2O5) and metal materials (TiN, TaN, W, Pt, Pd) in a gate-all-around configuration. This composite approach enables both high computational throughput and adaptability to various 2D material choices, resolving the contradiction between performance requirements and material versatility
2Adaptability or versatility
If a wider array of 2D materials is used to accommodate material supply constraints, then material versatility improves, but manufacturing complexity increases due to the need for precise crystallization control
Solution Approach 1:
The patent develops a universal crystallization process using high-k dielectric cap layers that works across multiple 2D material types (transition metal dichalcogenides, black phosphorus, group IV-VI materials). This single multi-functional approach replaces material-specific crystallization procedures, reducing fabrication complexity while maintaining broad 2D material compatibility
Solution Approach 2:
The patent introduces high-k dielectric cap layers (HfO2, Al2O3, TiO2, Ta2O5) as intermediary materials that facilitate controlled crystallization of diverse 2D channel materials. These cap layers act as mediators that enable precise crystallization control through adjustable deposition thickness and annealing parameters, simplifying the fabrication process while expanding 2D material options
3Productivity
If epitaxially-grown silicon is used for fabrication, then manufacturing precision is maintained with established processes, but device performance is insufficient to meet computational throughput requirements
Solution Approach 1:
The patent changes the manufacturing approach from epitaxial growth to atomic layer deposition (ALD) for crystallization, with precise control of deposition temperature (200-400°C), cap layer thickness (5-50 nm), and annealing parameters. This parameter control achieves atomic-level precision in crystalline structure formation, enabling high computational throughput while maintaining manufacturing precision
Solution Approach 2:
The patent replaces the mechanical/thermal epitaxial growth process with a chemical vapor deposition-based ALD process followed by thermal annealing. This substitution enables better control over crystalline quality and composition, achieving both high computational throughput and precise fabrication control that epitaxial methods cannot provide
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the performance characteristics of semiconductor devices, allowing them to accommodate a broader range of materials while maintaining high computational throughput and efficiency.
Implementation Method 1
re-crystallizing the two-dimensional material with the high-k dielectric cap layer present
Data Source
AI summary
Example implementations can include a semiconductor device with a first seed layer including a first material and having a planar structure, the first material having a two-dimensional structure, a first device layer including a second material and disposed over a first surface of the first seed layer, the second material having a crystallized structure, and a second device layer including the second material and disposed over a second surface of the first seed layer opposite to the first surface of the first seed layer.