Wafer-Level CSP Light Emitting Device Side-View Mounting
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Solution Overview
Problem
Existing light emitting devices with semiconductor chips face limitations in downsizing due to packaging with lead frames and challenges in achieving side-view type mounting in wafer-level Chip Scale Package (CSP) configurations, which restricts further miniaturization and increased luminous efficiency.
Innovation Solution
A method of manufacturing a light emitting device with a semiconductor stacked layer body, where a resin layer is formed with internal conductive members to expose electrodes on the side surfaces, allowing for side-view type mounting and wafer-level fabrication by removing the resin layer and internal conductive paths between adjacent elements, enabling external electrode connection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If lead frame packaging is used for light emitting devices, then electrical connection and mechanical support are achieved, but device size cannot be further reduced
Solution Approach 1:
The patent removes the traditional lead frame structure and extracts only the essential functions (electrical connection and mechanical support) to be performed by simplified components integrated directly with the semiconductor chip, enabling device size reduction while maintaining manufacturing feasibility
Solution Approach 2:
The patent merges the electrical connection function and mechanical support function into integrated structures that are combined with the semiconductor chip substrate, eliminating the need for separate lead frame components and reducing overall device size
2Length of moving object
If face-up type mounting with bonding wires is used, then electrical connection is achieved, but bonding wires must extend outside the light emitting element periphery limiting downsizing
Solution Approach 1:
The patent inverts the conventional face-up mounting approach by adopting face-down mounting configuration, where the semiconductor chip is mounted with its active surface facing downward toward the substrate, allowing bonding connections to be made underneath the chip and eliminating the need for bonding wires to extend beyond the chip periphery
Solution Approach 2:
The patent transitions the electrical connection approach from a planar configuration (bonding wires extending outward on the same plane) to a three-dimensional configuration (connections made through the substrate beneath the chip), effectively utilizing the vertical dimension to achieve compact packaging
3Use of energy by moving object
If growth substrate is removed or thinned to increase luminous efficiency, then light extraction is improved, but mechanical strength of the light emitting element is reduced
Solution Approach 1:
The patent employs composite material structures in the semiconductor chip layers and substrate integration to provide both high light extraction efficiency and sufficient mechanical strength, using multi-layer configurations with different material properties to simultaneously optimize optical and mechanical performance
4Productivity
If wafer-level CSP fabrication is implemented for side-view mounting, then productivity and downsizing are enhanced, but manufacturing precision requirements increase
Solution Approach 1:
The patent incorporates preliminary alignment features and pre-configured bonding structures during the wafer fabrication process, enabling subsequent side-view mounting operations to be performed with reduced precision requirements and enhanced productivity
Data Source
AI summary
A method of manufacturing a light emitting device includes preparing wafer with a plurality of light emitting elements arrayed on a growth substrate, on a first side of a semiconductor stacked layer body, forming a resin layer which includes metal wires respectively connected to a p-side electrode and an n-side electrode, forming a groove by removing at least portion of the resin layer from an upper surface side in a boundary region between the light emitting elements and exposing end surfaces of metal wires which are internal conductive members on an inner side surface defining a groove, forming electrodes for external connection respectively connecting to exposed end surfaces of metal wires, and singulating the wafer into a plurality of singulated light emitting elements.