CT Sigma-Delta Modulator Up-Conversion for Flicker Noise Reduction

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Solution Overview

Problem

Moderate bandwidth sigma-delta analog-to-digital converters (ADCs) face significant challenges with flicker noise, particularly in CMOS devices of 45 nm and 65 nm sizes, leading to increased device size and power consumption when attempting to reduce noise, while maintaining small device/circuit size and avoiding instability.

Innovation Solution

The method involves up-converting the input analog signal to a higher frequency to avoid the flicker noise region, using passive switches and bandpass filtering to reduce quantization noise, thereby minimizing the impact of flicker noise without increasing device size or power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If device size is increased to reduce flicker noise, then flicker noise is reduced, but device size increases 2 to 4 times

Engineering Contradiction:
Improveflicker noiseVSAvoiddevice size
Core Design Contradiction:
Object-affected harmful factorsVSArea of stationary object

Solution Approach 1:

The patent changes the frequency parameter of the signal by up-converting it to a higher frequency band. This parameter change moves the signal away from the flicker noise dominant low-frequency region, thereby reducing flicker noise impact without requiring increased device size. The frequency transformation allows the system to operate in a noise-friendly frequency range while maintaining compact dimensions.

Inventive Principle:
Principle #35Parameter changes

2Stability of the object's composition

If current consumption is increased to combat parasitic capacitances, then parasitic poles are stabilized, but power consumption increases

Engineering Contradiction:
Improveparasitic pole stabilityVSAvoidcurrent consumption
Core Design Contradiction:
Stability of the object's compositionVSUse of energy by moving object

Solution Approach 1:

The patent applies preliminary action by up-converting the signal to a higher frequency before it is significantly affected by parasitic capacitances. By transforming the signal frequency in advance, the system avoids the need to combat parasitic effects through increased current consumption, as the higher frequency operation naturally mitigates the impact of parasitic poles.

Inventive Principle:
Principle #10Preliminary action

3Object-affected harmful factors

If signal frequency is increased to avoid flicker noise region, then flicker noise impact is reduced, but quantization noise increases

Engineering Contradiction:
Improveflicker noise impactVSAvoidquantization noise
Core Design Contradiction:
Object-affected harmful factorsVSObject-generated harmful factors

Solution Approach 1:

The patent applies local quality by designing the modulator with specific characteristics optimized for the up-converted frequency band. The local quality principle is embodied in tailoring the modulator's transfer function and noise shaping characteristics to operate effectively at the higher frequency, thereby controlling quantization noise locally in the frequency domain where the signal resides, rather than suffering from general quantization noise increase.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS7791518B2Flicker noise reduction in continuous time (CT) sigma delta modulators (SDMS)
Publication Date: 2010.09.07 TEXAS INSTRUMENTS INC
  • US7791518B2 patent drawing
  • US7791518B2 patent drawing
  • US7791518B2 patent drawing

AI summary

Embodiments of a system for processing a signal may include a receiver configured to receive an input analog signal and an up converter coupled with the receiver and configured to up convert the analog signal to an up converted analog signal. Embodiments may further include an amplifier coupled with the up converter and configured to amplify the up converted analog signal to generate an amplified signal and also a bandpass filter coupled with the amplifier and configured to filter the amplified signal to generate a filtered analog signal. According to embodiments, the filtered analog signal may be fed to a quanitizer of the ADC. Intermediate signals made thus avoid the flicker noise region typically associated with an integrator of the ADC and may minimize the quantization noise associated with converting higher frequency analog signals.