CTDSM Instability Recovery Circuit for Saturation Events
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Solution Overview
Problem
Existing analog-to-digital converters (ADCs), particularly continuous time delta sigma modulators (CTDSMs), face instability issues due to saturation or high-frequency input signal changes, leading to inaccurate output signals and reduced stability, especially in applications requiring high resolution and low power consumption.
Innovation Solution
The CTDSM incorporates an instability recovery circuit that detects saturation or instability conditions and switches to a simpler sigma block configuration, using a second DAC to reduce the feedback loop complexity, while maintaining updates to the FIR filter and primary DAC, enabling a smoother transition back to nominal operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the CTDSM operates as an Nth order modulator with full feedback loop, then high resolution conversion is achieved, but instability occurs during saturation or high-frequency input changes
Solution Approach 1:
The system dynamically switches between Nth order and first order modulator configurations based on stability conditions. When instability is detected (saturation or high-frequency changes), the system transitions to a simpler first order configuration that is inherently more stable, then gradually recovers to the full Nth order configuration when stability is restored, allowing the system to adapt its complexity to operational conditions.
Solution Approach 2:
The instability recovery circuit extracts and isolates the problematic feedback path by switching the second DAC out of the main feedback loop during instability conditions. This separates the stable integrator chain from the potentially unstable feedback path, allowing the core integration function to remain operational while avoiding the instability source.
2Stability of the object's composition
If the feedback loop complexity is reduced during instability recovery, then stability is improved, but transition smoothness and resolution may be affected
Solution Approach 1:
The FIR filter continues updating its coefficients in the background even when the second DAC is switched out of the feedback loop. This preliminary action ensures that filter coefficients are ready and stable before the system transitions back to full operation, preventing abrupt changes that would affect output accuracy during the recovery process.
Solution Approach 2:
The first DAC serves as an intermediary feedback path that remains active during instability recovery. It provides a simplified but functional feedback mechanism that maintains basic operation stability while the system prepares to return to the full Nth order configuration, acting as a bridge between the unstable full-loop state and the stable reduced-loop state.
3Adaptability or versatility
If the system switches between different modulator orders, then adaptability to instability conditions is improved, but device complexity increases
Solution Approach 1:
The instability recovery circuit monitors its own operational state by detecting saturation conditions and high-frequency input changes, then automatically triggers the mode transition without external intervention. The system self-manages the complexity adaptation by using its internal signal characteristics to determine when to switch between modulator orders, reducing the need for external control logic.
Data Source
AI summary
In described examples, an integrated circuit (IC) includes first and second integrators, first and second weighted summers, first and second digital-to-analog converters (DACs), and a quantizer. First and second inputs of the first weighted summer are respectively connected to an output of the first integrator and an output of the second DAC. An input of the second integrator is connected to an output of the first weighted summer. An input of the second weighted summer is connected to an output of the second integrator. An input of the quantizer is connected to an output of the second weighted summer. Inputs of the first and second DACs are connected to respective outputs of the quantizer. An output of the first DAC is connected to a first input of the first integrator. A second input of the first integrator and a third input of the first weighted summer are analog signal inputs.