Continuous Time Linear Equalizer Jitter Reduction in High-Speed Transmitters

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Solution Overview

Problem

High-speed serial communication systems face significant distortion and jitter issues due to high-frequency losses and band-limited channels, which affect data transmission quality and bit error rates.

Innovation Solution

A transmitter driver is designed with a continuous time linear equalizer and voltage mode transmitters connected in parallel, incorporating a differential input stage, RC degeneration network, and current sources to reduce jitter amplification and enhance signal swing range.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If data streams are transferred at high data rates, then data transmission speed is improved, but signal distortion increases due to high-frequency losses

Engineering Contradiction:
Improvedata transmission speedVSAvoidsignal quality
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

A continuous time linear equalizer is introduced as an intermediary component between the voltage mode driver and the communication channel. The equalizer processes the signal to compensate for high-frequency losses and distortion, thereby maintaining signal quality at high data rates without requiring changes to the fundamental transmission architecture

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system dynamically adjusts equalization parameters and gain settings to optimize performance at different data rates. By changing operational parameters of the equalizer and driver stages, the system maintains reliable signal transmission across varying speed requirements

Inventive Principle:
Principle #35Parameter changes

2Reliability

If jitter attenuation apparatus is employed, then data distortion is reduced, but device complexity increases

Engineering Contradiction:
Improvedata distortion reductionVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The jitter attenuation function is merged with the existing equalizer and voltage mode driver stages. Rather than adding a separate dedicated jitter reduction system, the patent integrates jitter compensation capabilities into the signal transmission path components that are already present, thereby reducing overall system complexity while maintaining effectiveness

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If continuous time linear equalizer is used, then jitter amplification is reduced, but manufacturing precision requirements increase

Engineering Contradiction:
Improvejitter amplification reductionVSAvoidcomponent tolerance
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The equalizer incorporates adjustable and dynamically configurable components that allow for post-manufacturing calibration and adaptation. This dynamic capability enables the system to compensate for variations in component tolerances, reducing the stringency of manufacturing precision requirements while maintaining jitter reduction performance

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9608845B2Transmit apparatus and method
Publication Date: 2017.03.28 HUAWEI TECH CO LTD
  • US9608845B2 patent drawing
  • US9608845B2 patent drawing
  • US9608845B2 patent drawing

AI summary

A system comprises a transmitter coupled to a receiver through a plurality of transmission lines, wherein the transmitter comprises a continuous time linear equalizer and a voltage mode driver. The continuous time linear equalizer comprises a differential input stage, a RC degeneration network coupled to the differential input stage and a current source coupled to the differential input stage. The continuous time linear equalizer and the voltage mode driver share a same input port and a same output port.