Adaptive CTLE Equalization Using Low-High Frequency Power Comparison

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Solution Overview

Problem

Wide band data communication systems require multiple stages of signal processing, including equalization and amplification, but traditional continuous time linear equalization (CTLE) circuits often need additional gain stages and consume excessive power, especially in low-voltage systems.

Innovation Solution

A digitally controlled adaptive equalizer with a programmable CTLE and automatic gain control, utilizing a power comparator and controller to adjust the frequency response and gain based on the power levels of low and high frequency signal components, eliminating the need for intermediate buffers and reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional CTLE circuits are used with multiple gain stages, then signal equalization performance is improved, but power consumption increases excessively

Engineering Contradiction:
Improvesignal equalization performanceVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent combines the CTLE and PGA into a single integrated circuit block with shared control logic and power comparator, eliminating the need for separate intermediate buffers between stages. This merging reduces the total number of active components and inter-stage buffers, directly lowering power consumption while maintaining equalization performance through the unified feedback control mechanism.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent implements automatic gain control using a power comparator that continuously monitors the output signal power and feeds back control signals to adjust the CTLE and PGA gain stages. This closed-loop feedback system optimizes the equalization performance dynamically while minimizing power consumption by adjusting gain only when necessary, rather than maintaining high gain throughout.

Inventive Principle:
Principle #23Feedback

2Reliability

If intermediate buffers are added between equalization stages, then signal integrity is improved, but device complexity and power consumption increase

Engineering Contradiction:
Improvesignal integrityVSAvoidnumber of buffer blocks
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the buffer function into the integrated CTLE-PGA circuit by using the internal signal path between stages as the buffering medium. The controlled gain stages themselves provide the necessary signal regeneration and level restoration that would otherwise require separate buffer blocks, thereby reducing device complexity while maintaining signal integrity through the unified circuit architecture.

Inventive Principle:
Principle #5Merging (Combining)

3Power

If multiple gain stages are used to achieve sufficient amplification, then signal strength is improved, but the system requires more components and higher voltage operation

Engineering Contradiction:
Improvesignal strengthVSAvoidnumber of gain stages
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

The patent combines multiple gain adjustment functions into a single integrated CTLE-PGA block with unified control. The CTLE provides continuous-time linear equalization with built-in gain control, and the PGA provides programmable gain amplification, both controlled by the same power comparator and control logic. This consolidation achieves the required signal strength through coordinated operation of merged gain stages rather than requiring separate, cascaded buffer-block-based stages.

Inventive Principle:
Principle #5Merging (Combining)

4Adaptability or versatility

If programmable CTLE with automatic gain control is implemented, then adaptability is improved, but device complexity increases

Engineering Contradiction:
Improveautomatic gain control capabilityVSAvoidcontroller circuitry
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The power comparator serves multiple functions: it compares the power of low-frequency and high-frequency signal components to determine equalization needs, generates control signals for both the CTLE and PGA gain stages, and implements the automatic gain control algorithm. This multi-functional design provides adaptability through a single unified controller rather than requiring separate control circuits for each function, thereby managing device complexity while achieving programmable adaptability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11206161B1Adaptive equilizer and gain controller
Publication Date: 2021.12.21 NXP BV
  • US11206161B1 patent drawing
  • US11206161B1 patent drawing
  • US11206161B1 patent drawing

AI summary

An adaptive equalizer and automatic gain controller is disclosed. The adaptive equalizer and automatic gain controller includes a programmable continuous time linear equalizer (CTLE). The CTLE includes a control port to receive a control signal to adjust a frequency response of the CTLE. The adaptive equalizer and automatic gain controller also includes a power comparator coupled with an output of the CTLE and a controller coupled with the power comparator and the control port and configured to generate the control signal for the CTLE based on the output of the power comparator. The power comparator is configured to compare power of a low frequency part and a high frequency part of an output signal of the CTLE.