Cu Metallization Barrier Layers for Power Semiconductor Stability
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Solution Overview
Problem
The use of copper (Cu) metallization in semiconductor devices leads to issues such as reaction with silicon at room temperature, diffusion of Cu atoms into Si, and electrochemical reactions resulting in Cu dendrite formation, which can cause instability and increased forward voltage and leakage current, particularly in the edge termination region where traditional barrier layers like TiW cannot be applied continuously.
Innovation Solution
A semiconductor device with a high-melting metal or alloy barrier layer in the active zone and an amorphous semi-isolating material barrier layer in the peripheral zone, where the two layers partially overlap to form a continuous barrier against Cu diffusion, using materials like TiW and diamond-like carbon (DLC) to prevent Cu ion migration and reaction with silicon.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If Cu metallization is used to improve heat dissipation and load change performance, then operating temperature capability and resistivity performance are improved, but Cu reacts with Si to form Cu silicides and Cu atoms diffuse into Si reducing minority charge carrier lifetime
Solution Approach 1:
A barrier layer comprising a high-melting metal or high-melting alloy is introduced between the Cu metallization layer and the Si semiconductor body. This intermediary layer prevents direct contact and reaction between Cu and Si, blocking Cu diffusion into the semiconductor while maintaining the thermal and electrical performance benefits of Cu metallization.
Solution Approach 2:
The barrier layer uses composite material structures, including high-melting metals (W, Ta, Mo) or their alloys, which combine high melting points with good adhesion to both Cu and Si. This composite approach provides effective diffusion barrier properties while maintaining structural integrity at elevated temperatures.
2Reliability
If TiW barrier layer is applied to prevent Cu diffusion, then Cu reaction with Si is inhibited, but the barrier layer cannot be applied continuously in the edge termination region as it would shortcut the device
Solution Approach 1:
The barrier layer structure is adapted to different regions of the semiconductor device. In the active zone, a continuous barrier layer is applied, while in the edge termination region, the barrier layer is applied selectively or discontinuously to prevent Cu diffusion without creating short circuits. This local adaptation allows the barrier to function effectively in both regions with different electrical requirements.
3Stability of the object's composition
If field-plate assemblies are applied in the edge termination region, then field distribution is improved, but the areas between field-plates become potential soft spots for Cu ion intrusion
Solution Approach 1:
The barrier layer serves as an intermediary protection between the Cu-containing metallization structures (including field-plates) and the underlying semiconductor. Even in regions where field-plate assemblies create potential intrusion paths, the barrier layer blocks Cu ion migration, preventing the formation of Cu dendrites and maintaining the stability of the field distribution structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively inhibits Cu diffusion and reaction with silicon, enhancing the stability and reliability of semiconductor devices by maintaining a barrier against Cu ions and improving resistance and reducing the risk of Cu dendrite formation, thus ensuring long-term performance and endurance.
Implementation Method 1
a first barrier layer, comprising a high-melting metal or a high-melting alloy, between the active zone and the metallization layer
Implementation Method 2
an amorphous semi-isolating material barrier layer in the peripheral zone... to prevent Cu ion migration and reaction with silicon
Implementation Method 3
The first barrier layer and the second barrier layer partially overlap and form an overlap zone. The overlap zone extends over an entire circumference of the active zone
Data Source
AI summary
A power semiconductor device includes a semiconductor body, having an active zone and a high voltage peripheral zone laterally adjacent to each other, the high voltage peripheral zone laterally surrounding the active zone. The device further includes a metallization layer on a front surface of the semiconductor body and connected to the active zone, a first barrier layer, comprising a high-melting metal or a high-melting alloy, between the active zone and the metallization layer, and a second barrier layer covering at least a part of the peripheral zone, the second barrier layer comprising an amorphous semi-isolating material. The first barrier layer and the second barrier layer partially overlap and form an overlap zone. The overlap zone extends over an entire circumference of the active zone. A method for producing such a power semiconductor device is also provided.