Dual-Sided Cu Electrode Semiconductor Package for Heat Dissipation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor devices for power conversion, such as MOSFETs, face challenges in heat dissipation and integration with multilayered printed boards, limiting their efficiency and ease of embedding in compact power conversion devices.
Innovation Solution
The semiconductor device design includes thin-plate Cu electrode plates on both surfaces of the semiconductor chip, with conductive layers and mold layers for improved heat dissipation and adherence, allowing for easier embedding in multilayered printed boards and efficient power conversion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If conventional semiconductor devices are used, then the device structure is simple, but heat dissipation performance is poor
Solution Approach 1:
The patent introduces electrode plates on both the upper and lower surfaces of the semiconductor device, transitioning from a conventional single-surface configuration to a dual-surface three-dimensional structure. This dimensional change enables heat to be dissipated from multiple surfaces simultaneously, significantly improving thermal management performance.
Solution Approach 2:
The device structure is segmented into multiple functional layers including first electrode plates on the lower surface, second electrode plates on the upper surface, insulating layers, and conductive layers. This segmentation allows each layer to perform its specific function optimally while collectively achieving superior heat dissipation.
2Adaptability or versatility
If conventional semiconductor devices are used, then manufacturing process is simple, but integration with multilayered printed boards is difficult
Solution Approach 1:
The electrode plates serve multiple functions: they provide electrical connection to the printed board, act as heat dissipation paths, and facilitate integration with multilayered board structures. This multi-functionality enhances adaptability to various printed board configurations while maintaining manufacturing feasibility.
Solution Approach 2:
Insulating layers and conductive layers are introduced as intermediary elements between the electrode plates and the printed board. These intermediaries enable proper integration with multilayered printed boards by providing electrical isolation where needed and conductive paths where required, facilitating versatile integration.
3Temperature
If conventional semiconductor devices are used, then device size is small, but heat dissipation area is limited
Solution Approach 1:
By adding electrode plates to both the upper and lower surfaces of the device, the heat dissipation area is effectively doubled without proportionally increasing the device volume. This utilizes the third dimension (z-axis) to expand thermal management capability while maintaining compact form factor.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances heat dissipation and facilitates the formation of interconnect layers, enabling easier integration into compact power conversion devices like DC-DC converters with improved performance.
Implementation Method 1
thin-plate Cu electrode plates on both surfaces of the semiconductor chip, with conductive layers and mold layers for improved heat dissipation
Data Source
AI summary
According to one embodiment, a semiconductor device includes a semiconductor chip, drain, source and gate electrodes, mold layers and first and second coating films. The semiconductor chip has a drain region on a first surface, and source and gate regions on a second surface facing the first surface. The drain electrode is provided on the drain region. The source electrode is provided on the source region. The gate electrode is provided on the gate region. The mold layers are provided on side surfaces of the semiconductor chip, the source and gate electrodes. The first coating films are provided on a lower surface and side surfaces of the drain electrode, an upper surface of the source electrode, and an upper surface of the gate electrode. The second coating films are provided on an upper surface and side surfaces of the mold layers.