Cu Metal Passivation Stack for Adhesion and Edge Termination
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Solution Overview
Problem
Semiconductor devices, particularly power semiconductor devices, face challenges in achieving high adhesion and electrical suitability for passivation layers on metal structures, especially for chip edge termination, due to environmental influences like humidity and temperature fluctuations.
Innovation Solution
A semiconductor device with a metal structure made of Cu or a Cu-based alloy, featuring a passivation layer comprising a first layer of CuSiN and a second layer of Si, N, and H, where the Si to N atomic ratio is equal to or greater than 3.3/4, providing enhanced adhesion and electrical properties.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a passivation layer is integrated on metal structures to improve resistance to environmental influences, then reliability is improved, but manufacturing difficulty increases due to adhesion requirements and electrical compatibility
Solution Approach 1:
The passivation layer is divided into multiple sub-layers with distinct functions: a first passivation layer (silicon nitride) providing environmental protection, a second passivation layer (silicon oxide) providing adhesion and electrical properties, and an intermediate layer facilitating integration. This segmentation allows each layer to be optimized independently for its specific function, resolving the contradiction between reliability and manufacturing ease.
Solution Approach 2:
The patent employs a composite passivation structure combining different materials (silicon nitride, silicon oxide, and intermediate layers) to achieve both high reliability against environmental influences and manufacturability. Each material contributes specific properties that collectively solve the adhesion and electrical compatibility challenges.
2Reliability
If a passivation layer is applied to metal structures for chip edge termination, then electrical suitability is improved, but adhesion requirements become more stringent
Solution Approach 1:
Different regions of the passivation structure have different material compositions and properties tailored to local requirements: the intermediate layer provides adhesion at the metal interface, the first passivation layer provides environmental protection, and the second passivation layer provides electrical properties at the chip edge. This local optimization resolves the contradiction between electrical suitability and adhesion strength.
Solution Approach 2:
An intermediate layer is introduced between the metal structure and the passivation layers to serve as a mediator that enhances adhesion while maintaining electrical suitability for chip edge termination. This intermediate layer acts as a buffer that reconciles the conflicting requirements of strong adhesion and proper electrical properties.
3Duration of action of stationary object
If environmental protection is enhanced through passivation, then device lifetime is extended, but process complexity increases
Solution Approach 1:
The passivation structure is segmented into functional layers that can be deposited using standard semiconductor processing techniques, making the complex structure manufacturable. Each layer serves a specific protective function, and the segmentation allows for controlled deposition and integration without excessive process complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The described passivation layer effectively protects the semiconductor device from environmental impacts, ensures high adhesion to the metal structure, and provides suitable electrical conductivity for chip edge termination, thereby improving the device's reliability and performance.
Implementation Method 1
a first passivation layer comprising CuSiN
Implementation Method 2
Passivation layers on metal structures are used to improve the resistance of the device to environmental influences
Data Source
AI summary
A semiconductor device includes a semiconductor substrate. A metal structure is disposed over the semiconductor substrate. A metal of the metal structure is Cu or a Cu-based alloy. A passivation layer is disposed over the metal structure. The passivation layer includes a first layer including CuSiN, and a second layer including Si, N and H. In atomic numbers, a ratio of Si to N is equal to or greater than 3.3/4. A method of manufacturing the semiconductor device is also described.