Cu Pillar Laminated Structure for Flip-Chip Mounting
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Solution Overview
Problem
Flip-chip mounting using Cu pillars faces challenges such as solder protrusion and decreased adhesiveness due to thermal expansion coefficient differences between semiconductor chips and mounting boards, leading to reliability issues and potential short circuits.
Innovation Solution
A laminated structure for the Cu pillar is formed with a bump smaller than the barrier layer, which suppresses solder wet rise and provides a larger margin against lateral movement, ensuring reliable bonding by maintaining the bump's size relative to the barrier layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a Cu pillar is used for flip-chip mounting to handle narrow pitch and larger current, then the current carrying capacity and pitch compatibility are improved, but solder may protrude laterally and adhere to the sidewall of the pillar, causing a decrease in short margin
Solution Approach 1:
The Cu pillar structure is segmented into multiple functional layers: a Cu pillar layer for current conduction, a barrier layer to prevent solder adhesion to the pillar sidewall, and a bump structure. This segmentation allows each layer to perform its specific function independently, solving the problem of solder protrusion while maintaining current carrying capacity.
Solution Approach 2:
A barrier layer is introduced as an intermediary between the solder and the Cu pillar sidewall. This barrier layer prevents direct contact and adhesion between the solder and the Cu pillar, thereby maintaining the short margin and preventing solder protrusion issues.
2Strength
If solder bonding is performed between semiconductor chip and mounting board, then the bonding strength is improved, but solder may reach the chip surface by wet rise over the pillar sidewall, decreasing adhesiveness between chip and Cu pillar
Solution Approach 1:
The barrier layer serves as an intermediary that controls solder flow during bonding. It allows the solder to bond the chip to the mounting board while preventing the solder from rising up the pillar sidewall and reaching the chip surface, thus maintaining the adhesiveness between the chip and Cu pillar.
Solution Approach 2:
The barrier layer provides localized protection at the pillar sidewall region where solder wet rise occurs. By applying the barrier layer specifically at this critical location, the patent prevents solder adhesion to the pillar sidewall without affecting the overall bonding process or other regions of the structure.
3Reliability
If the bump is made smaller than the barrier layer in the laminated structure, then solder wet rise is suppressed and short margin is increased, but the manufacturing precision requirement becomes more stringent
Solution Approach 1:
The barrier layer is formed with a predetermined size larger than the bump in advance, before the soldering process. This preliminary sizing ensures that even with manufacturing variations, the barrier layer always extends beyond the bump, providing a consistent margin against solder protrusion without requiring extremely tight control on the bump dimensions themselves.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the reliability of flip-chip mounting by preventing solder protrusion and maintaining adhesiveness, thus reducing the risk of short circuits and improving the overall performance of semiconductor devices.
Implementation Method 1
a pillar made of Cu is formed, by using a plating process, over a terminal pad of a semiconductor chip in order to be coupled to a mounting board, and hence the Cu pillar can deal with a narrow pitch, and can deal with a larger current
Implementation Method 2
a pillar made of Cu is formed, by using a plating process, over a terminal pad of a semiconductor chip
Implementation Method 3
When a semiconductor chip is bonded to a mounting board by solder
Implementation Method 4
there is the fear that the solder in the semiconductor chip and that in the mounting board may move laterally at the outer peripheries of them due to a difference between the thermal expansion coefficients thereof
Data Source
AI summary
A flip-chip mounting technique with high reliability is provided in flip-chip mounting using a Cu pillar. In a semiconductor device to be coupled to a mounting board via a Cu pillar, the Cu pillar is caused to have a laminated structure including a pillar layer, a barrier layer, and a bump in this order from below, and the bump is formed to be smaller than the barrier layer.