Multilayer Cu-Ti Electrodes for Oxide Semiconductor TFTs
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Solution Overview
Problem
The electrical resistance of multilayer electrodes or wires in semiconductor devices with oxide semiconductor TFTs increases due to Ti diffusion, particularly when a Cu-containing layer is used, leading to degraded TFT characteristics and reliability issues.
Innovation Solution
A semiconductor device with a multilayer electrode structure where a copper layer is thicker than a titanium or molybdenum layer, with the titanium layer in contact with the oxide semiconductor layer and the copper layer having a thickness ratio of 9:1 to 25:1, and heat treatment at 350°C to 500°C to stabilize the TFT characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a Ti layer is formed between the Cu layer and the oxide semiconductor layer to reduce contact resistance, then the adhesiveness is improved, but the electrical resistance of the Cu layer increases due to Ti diffusion
Solution Approach 1:
The patent changes the thickness parameter of the Cu layer, making it greater than the Ti layer thickness. This parameter adjustment ensures that even when Ti diffuses into the Cu layer during heat treatment, the overall electrical resistance increase is minimized because the Cu layer maintains sufficient thickness to preserve its low-resistance properties while still allowing the Ti layer to provide adequate adhesiveness at the interface.
Solution Approach 2:
The patent employs a composite multilayer structure combining Cu and Ti layers with specific thickness ratios. This composite approach leverages the low electrical resistance of Cu and the high adhesiveness of Ti, creating a synergistic structure where each material contributes its optimal property while mitigating the drawbacks of the other through proper dimensional design.
2Reliability
If heat treatment is performed to stabilize TFT characteristics, then the TFT performance is improved, but Ti diffusion into the Cu layer increases causing resistance increase
Solution Approach 1:
The patent prepares the Cu layer in advance with a thickness greater than the Ti layer before heat treatment occurs. This pre-configured thickness ratio acts as a cushion against the harmful effects of Ti diffusion during subsequent heat treatment processes, ensuring that the Cu layer maintains adequate electrical conductivity even after exposure to elevated temperatures that promote diffusion.
3Reliability
If the Ti layer thickness is increased to improve adhesiveness, then the contact resistance decreases, but the electrical resistance of the multilayer structure increases
Solution Approach 1:
The patent optimizes the thickness parameters by setting the Cu layer thickness greater than the Ti layer thickness. This parameter configuration achieves a balance where the Ti layer is sufficiently thick to provide low contact resistance and good adhesiveness, while the Cu layer remains thick enough to dominate the electrical resistance characteristics, maintaining overall low resistance in the multilayer electrode structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces the electrical resistance of the multilayer structure and enhances the adhesiveness between the gate electrode and substrate, maintaining reliable TFT performance while allowing higher temperature oxidation treatment.
Implementation Method 1
enhance the adhesiveness between the two
Implementation Method 2
heat treatment at 350°C to 500°C to stabilize the TFT characteristics
Implementation Method 3
suppress an increase in the electrical resistance of an electrode or a wire having a multilayer structure
Data Source
AI summary
A semiconductor device (100) is provided with a thin film transistor including an oxide semiconductor layer (5), a gate electrode (3), a gate insulating layer (4), and a source electrode (7s) and a drain electrode (7d) that are in contact with the oxide semiconductor layer, at least one electrode of the source electrode (7s), the drain electrode (7d), and the gate electrode (3) has a multilayer structure that includes a first layer (3A, 7A) containing copper and a second layer (3B, 7B) containing titanium or molybdenum, the thickness of the first layer (3A, 7A) is more than the thickness of the second layer (3B, 7B), when the source electrode (7s) or the drain electrode (7d) has the multilayer structure, the second layer is arranged on the oxide semiconductor layer side of the first layer so as to be in contact with the surface of the oxide semiconductor layer (5), when the gate electrode (3) has the multilayer structure, the second layer is arranged on the substrate (1) side of the first layer, and the thickness of the second layer is 15 nm or more and 25 nm or less.