Cu Wire Bond Pad Layout Around Void Trench Isolation
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Solution Overview
Problem
In semiconductor devices with trench isolation structures having voids, the push-pull test for evaluating the connection strength of Cu wires can cause shear stress, leading to silicon peeling, oxide film peeling, or cracking.
Innovation Solution
The semiconductor device incorporates a circular trench isolation arrangement prohibition region that overlaps with the end portion of the Cu ball in plan view, and the second trench isolation with a void is separated from this prohibition region, preventing the formation of shear stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Shape
If a trench isolation structure with a void is used, then the aspect ratio of the trench can be increased, but shear stress acts on the void boundary during push-pull testing causing silicon peeling or cracking
Solution Approach 1:
The invention extracts and removes the harmful void from the trench isolation structure. By filling the void with a dielectric material or removing it entirely, the source of stress concentration is eliminated, preventing silicon peeling and cracking during push-pull testing while maintaining the high aspect ratio benefit
Solution Approach 2:
The invention introduces an intermediary material (dielectric filling material) into the void space. This intermediary material acts as a stress buffer and load distributor, preventing direct stress concentration at the void boundary that would cause silicon peeling and cracking
2Ease of manufacture
If Cu wire bonding is performed, then electrical connection is achieved, but the Cu electrode swings during bonding causing cracking in the interlayer dielectric film
Solution Approach 1:
The invention applies preliminary anti-action by forming a reinforcement structure (such as a support layer or modified electrode configuration) before the wire bonding process. This preliminary structure counteracts the swinging motion of the Cu electrode during bonding, preventing cracking in the interlayer dielectric film
Data Source
AI summary
A semiconductor device including an element isolation in a trench formed in an upper surface of a semiconductor substrate, a trench isolation including a void in a trench directly under the element isolation, and a Cu wire with Cu ball connected to a pad on the semiconductor substrate, is formed. The semiconductor device has a circular trench isolation arrangement prohibition region that overlaps the end portion of the Cu ball in plan view, and the trench isolation is separated from the trench isolation arrangement prohibition region in plan view.