Cubic GaN Epitaxy on SOI Grooves for Low-Defect Micro-LEDs
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Solution Overview
Problem
The production of GaN-based micro-LEDs is hindered by material defects and intrinsic polarization fields, leading to efficiency losses, and the growth of cubic GaN on silicon substrates results in polycrystalline structures with rough surfaces and twist boundaries, making it incompatible with cost-effective high-volume manufacturing.
Innovation Solution
A method involving silicon-on-insulator patterning to create U-shaped grooves on silicon substrates, allowing for the selective growth of cubic GaN by controlling the angle of silicon sidewalls, which facilitates the transition from hexagonal to cubic phase, enabling seamless integration with silicon CMOS materials and reducing defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If GaN epitaxy is grown on substrates with high lattice-mismatch (sapphire, silicon, or SiC), then device fabrication can proceed, but material defects increase significantly due to misalignment and asymmetry between substrate and GaN regrowth
Solution Approach 1:
The patent introduces a buffer layer as an intermediary between the silicon substrate and the GaN epitaxial layer. This buffer layer serves as a transition medium that accommodates the lattice mismatch and reduces misalignment between the substrate and GaN regrowth, thereby decreasing material defects while maintaining substrate compatibility
Solution Approach 2:
The patent modifies growth parameters including temperature, pressure, and gas flow rates during the epitaxial growth process to optimize the formation of the buffer layer and control the transition from hexagonal to cubic phase, reducing defects caused by lattice mismatch
2Ease of manufacture
If wurtzite phase GaN is used in common growth direction, then standard fabrication processes can be applied, but polarization fields cause efficiency losses at elevated bias current densities
Solution Approach 1:
The patent utilizes phase transition from hexagonal wurtzite phase to cubic phase during the epitaxial growth process. By controlling growth conditions, the material transforms to cubic phase which eliminates polarization fields, thereby reducing efficiency droop while maintaining compatibility with standard fabrication processes
Solution Approach 2:
The patent changes growth parameters such as temperature, pressure, and gas composition to induce and control the phase transition from wurtzite to cubic structure, achieving polarization-free GaN that reduces energy loss at elevated current densities
3Adaptability or versatility
If cubic GaN is grown on silicon substrates using conventional methods, then integration with silicon CMOS is achieved, but polycrystalline structures with rough surfaces and twist boundaries form
Solution Approach 1:
The patent introduces a buffer layer as an intermediary that facilitates the transition from silicon substrate to cubic GaN epitaxial layer. This buffer layer enables crystal orientation control and promotes single-crystal growth, eliminating polycrystalline structures and twist boundaries while maintaining silicon CMOS integration
Solution Approach 2:
The patent employs asymmetric groove structures with specific angle ranges (50-70 degrees) to control crystal growth orientation. This asymmetric geometry guides the formation of cubic phase GaN with proper orientation, achieving high crystal structure quality and enabling silicon CMOS integration
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method achieves high-quality, polarization-free cubic GaN growth, facilitating multi-wavelength emission and integration with silicon technology, suitable for high-speed communication systems and cost-effective manufacturing.
Implementation Method 1
allowing for the selective growth of cubic GaN by controlling the angle of silicon sidewalls, which facilitates the transition from hexagonal to cubic phase
Implementation Method 2
epitaxially growing a semiconductor layer over the buffer layer, whereby least a portion of the buffer layer exhibits a cubic crystalline phase lattice structure
Data Source
AI summary
A method for fabricating a semiconductor device, the method comprising the steps of: providing a silicon-on-insulator (SOI) substrate, the SOI substrate comprising a groove exposing different crystal facing a planar surface; depositing a buffer layer over the substrate; epitaxially growing a semiconductor layer over the buffer layer, whereby least a portion of the buffer layer exhibits a cubic crystalline phase structure.