CuMn Liner Filling for High-Aspect-Ratio Semiconductor Openings
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Solution Overview
Problem
The manufacturing and integration of semiconductor devices face challenges such as void formation in conductive structures due to difficulties in filling high aspect ratio openings, leading to increased complexity and deficiencies in device performance.
Innovation Solution
The use of a copper-manganese (CuMn) liner or barrier layer is introduced to separate conductive structures from dielectric layers, reducing or preventing void formation, thereby improving contact resistance and electromigration reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional filling methods are used for high aspect ratio openings, then the conductive structure can be formed, but voids form in the conductive structure leading to poor contact resistance and reliability
Solution Approach 1:
A copper-manganese (CuMn) liner is introduced as an intermediary layer between the dielectric layer and the copper fill material. This liner acts as a mediator that facilitates complete filling of the high aspect ratio opening while preventing void formation, thereby improving both manufacturing precision and reliability of the conductive structure
Solution Approach 2:
The patent uses a composite material approach by combining copper and manganese to form CuMn liner with specific composition ratios (e.g., Cu70Mn30, Cu80Mn20). This composite material provides superior adhesion and filling characteristics compared to pure copper or conventional barrier layers, enabling void-free filling of high aspect ratio openings
2Productivity
If the opening aspect ratio is increased to achieve higher integration density, then device functionality is improved, but void formation becomes more difficult to prevent
Solution Approach 1:
The CuMn liner serves as a specialized intermediary that enables successful filling of extremely high aspect ratio openings (e.g., 5:1 or higher). This intermediary layer provides the necessary adhesion and surface properties that allow copper electrophoresis or electroplating to complete filling even in very narrow, deep openings, thus supporting higher integration density without sacrificing filling quality
3Reliability
If conventional barrier layers are used to separate conductive structures from dielectric layers, then electrical isolation is achieved, but voids still form and contact resistance increases
Solution Approach 1:
The patent replaces conventional barrier layers (such as tungsten or titanium nitride) with CuMn composite material that provides both electrical isolation and superior filling characteristics. The specific composition of CuMn offers the right balance of adhesion, conductivity, and barrier properties, achieving electrical isolation while preventing void formation and reducing contact resistance
Data Source
AI summary
The present disclosure provides a method for preparing a semiconductor device with a copper-manganese liner. The method includes forming an opening structure in a first dielectric layer, wherein the opening structure has a first portion, a second portion and a third portion disposed between and physically connecting the first portion and the second portion; forming a lining material lining the first portion and the second portion of the opening structure and completely filling the third portion of the opening structure, wherein the lining material includes copper-manganese (CuMn); filling the first portion and the second portion of the opening structure with a conductive material after the lining material is formed; and performing a planarization process on the lining material and the conductive material.