Cup-Shaped Solder Stand for Semiconductor Substrate Warpage

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional semiconductor packaging substrates face issues with rigidity and warpage due to mismatched thermal expansion coefficients, leading to poor bonding and increased risk of solder tin ball breakage or detachment, especially in large-sized packages, which complicates high-temperature processing and affects electrical integrity.

Innovation Solution

The introduction of a cup-shaped solder stand structure formed via electroplating, extending from the exposed surface of the circuit layer to the hole wall, made of the same material as the circuit layer, increases the metal contact area and bonding force, enhancing the connection between the solder tin ball and the substrate, while maintaining substrate rigidity through a metal support layer and insulating encapsulation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If the packaging substrate is made large-sized to carry large chips, then the chip mounting capacity is improved, but the substrate rigidity deteriorates causing warpage

Engineering Contradiction:
Improvepackaging substrate areaVSAvoidsubstrate rigidity
Core Design Contradiction:
Area of stationary objectVSStrength

Solution Approach 1:

The patent employs a composite structure combining organic substrate material with a metal support layer (copper, aluminum, or stainless steel) to create a packaging substrate that maintains both large area and high rigidity. The metal support layer provides the necessary mechanical strength to prevent warpage while allowing the substrate to accommodate large chips.

Inventive Principle:
Principle #40Composite materials

2Reliability

If the metal contact surface is increased to improve bonding force, then the connection reliability is improved, but the manufacturing complexity increases

Engineering Contradiction:
Improvebonding forceVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent transitions from a single-surface contact configuration to a multi-surface contact configuration by forming the metal contact layer on both the top surface and the sidewalls of the contact hole. This dimensional expansion increases the bonding area and bonding force without requiring additional separate components, thus improving reliability while controlling manufacturing complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Strength

If the core layer is made thicker to improve rigidity, then the warpage is reduced, but the packaging profile increases

Engineering Contradiction:
Improvesubstrate rigidityVSAvoidsubstrate thickness
Core Design Contradiction:
StrengthVSLength of stationary object

Solution Approach 1:

The patent applies local reinforcement by inserting a metal support layer specifically at the contact hole region where mechanical strength is most needed, rather than uniformly thickening the entire core layer. This localized approach provides the necessary rigidity to prevent warpage while maintaining a thin overall substrate profile for compact packaging.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design effectively prevents solder tin ball breakage or detachment, ensures robust bonding, and maintains substrate rigidity, even in large-sized packages, thereby preventing warpage and ensuring reliable electrical connections during high-temperature processing.

Implementation Method 1

at least a solder stand being in a cup-shaped structure, formed via electroplating, and extending from an exposed surface of the circuit layer to a hole wall of the hole

Methodology Applied
Scientific EffectElectroplating: Electroplating

Data Source

PatentUS11335630B2Semiconductor package substrate, electronic package and methods for fabricating the same
Publication Date: 2022.05.17 PHOENIX PIONEER TECH
  • US11335630B2 patent drawing
  • US11335630B2 patent drawing
  • US11335630B2 patent drawing

AI summary

A semiconductor packaging substrate and a method for fabricating the same are provided. The method includes forming a solder resist structure having a hole on a circuit structure, with a portion of the circuit structure exposed from the hole, and forming a cup-shaped solder stand on the exposed circuit layer and a hole wall of the hole. During a packaging process, the design of the solder stand increases a contact area of a solder tin ball with a metal material. Therefore, a bonding force between the solder tin ball and the solder stand is increased, and the solder tin ball can be protected from being broken or fell off. An electronic package having the semiconductor packaging substrate and a method for fabricating the electronic package are also provided.