Cuprous Oxide Transistors Using Low-Temperature Plasma Oxidation
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Solution Overview
Problem
Conventional methods for forming cuprous oxide transistors in BEOL levels face challenges such as high process temperatures leading to contamination and impurity diffusion, and the need for high-quality cuprous oxide layers suitable for p-type transistors is unmet.
Innovation Solution
A method involving plasma-enhanced oxidation at controlled temperatures between 350° C. and 450° C. forms a crystalline cuprous oxide layer on a copper layer, using an inert dielectric layer to control oxygen supply, which is then transferred and bonded to form transistors for BEOL applications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional high-temperature methods are used to form cuprous oxide layers, then oxidation can be achieved, but contamination and impurity diffusion occur
Solution Approach 1:
The patent changes the temperature parameter from conventional high-temperature processing to low-temperature plasma-enhanced oxidation (350-450°C), fundamentally altering the processing conditions to achieve oxidation without the harmful effects of high temperature such as contamination and impurity diffusion
Solution Approach 2:
The patent replaces thermal oxidation (heat-driven) with plasma-enhanced oxidation (plasma-driven), substituting a thermal process with a plasma-based process that achieves oxidation at lower temperatures, thereby eliminating the harmful effects associated with high-temperature processing
2Temperature
If amorphous silicon transistors are used at low process temperatures, then thermal budget constraints are satisfied, but carrier mobility is insufficient for BEOL power gate or I/O devices
Solution Approach 1:
The patent uses cuprous oxide, a crystalline oxide semiconductor material, which combines the low processing temperature advantage with high carrier mobility, creating a composite solution that satisfies both thermal budget constraints and performance requirements for BEOL devices
Solution Approach 2:
The patent changes the material phase from amorphous to crystalline, and from elemental silicon to oxide semiconductor (cuprous oxide), fundamentally altering the material properties to achieve both low-temperature processing capability and high carrier mobility necessary for BEOL power gate and I/O devices
3Area of stationary object
If peripheral devices are moved from FEOL to BEOL levels, then area savings of 5-10% are achieved, but thermal budget constraints and manufacturing complexity increase
Solution Approach 1:
The patent changes the processing temperature parameter to low-temperature plasma-enhanced oxidation, enabling peripheral devices to be fabricated at BEOL levels where thermal budget is constrained, thereby achieving area savings while maintaining manufacturing feasibility
Solution Approach 2:
The patent replaces conventional high-temperature oxidation processes with plasma-enhanced oxidation, substituting a thermally-intensive process with a plasma-based process that can be performed at lower temperatures, thus reducing manufacturing complexity and enabling BEOL integration of peripheral devices
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables the formation of high-quality crystalline cuprous oxide layers at low temperatures, suitable for p-type transistors, addressing the thermal budget constraints and improving transistor performance.
Implementation Method 1
A method involving plasma-enhanced oxidation at controlled temperatures between 350° C. and 450° C. forms a crystalline cuprous oxide layer on a copper layer
Implementation Method 2
plasma-enhanced oxidation at controlled temperatures between 350° C. and 450° C. forms a crystalline cuprous oxide layer
Data Source
AI summary
Structures and methods of forming the same are provided. A structure according to the present disclosure includes an interconnect structure, an aluminum oxide layer over the interconnect structure, and a transistor formed over the aluminum oxide layer. The transistor includes cuprous oxide.