Current Balance Circuit for Multiphase DC-DC Converters

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Solution Overview

Problem

Conventional multiphase DC-DC converters face issues with current imbalance due to mismatches between power transistors, inductors, and controllers, leading to efficiency reduction and potential overheating, and the current balance technique's loop gain varies with input and output voltages, affecting performance and stability.

Innovation Solution

A current balance circuit that adjusts the time of starting to increase the voltage of ramp signals, maintaining a constant slope and amplitude, using a current error calculation circuit, time shift circuit, and ramp generator to generate current balance signals and shift clock signals, ensuring equal inductor currents across channels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the conventional current balance technique adjusts the slope (amplitude) of ramp signals to achieve current balance, then the current imbalance can be corrected, but the loop gain of the current balance technique varies with output and input voltages, affecting system stability

Engineering Contradiction:
Improvecurrent balance performanceVSAvoidloop gain stability
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The patent changes the parameter being adjusted from ramp signal amplitude to ramp signal timing (when the voltage starts to increase). The current balance circuit shifts the timing of the ramp signal voltage increase based on current balance signals, while maintaining a constant slope and amplitude. This parameter change resolves the issue of varying loop gain because the fixed slope ensures consistent gain characteristics across different operating conditions.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The ramp signal serves multiple functions: it provides the timing reference for PWM generation and simultaneously enables current balance control through timing shifts. The same ramp signal structure is used for both voltage control and current balance, eliminating the need for separate adjustment mechanisms and ensuring consistent loop gain behavior.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If the multiphase DC-DC converter distributes currents equally to each channel, then the current driving capability and efficiency are improved, but mismatches between power transistors, inductors, and controllers cause current imbalance

Engineering Contradiction:
Improvecurrent driving capabilityVSAvoidcurrent balance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The current balance circuit uses feedback from current detection to generate current balance signals. The detection circuit monitors the actual current in each channel, and the feedback mechanism adjusts the ramp signal timing for each channel based on detected imbalances, ensuring equal current distribution despite component mismatches.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

Each channel receives a customized ramp signal with timing specifically adjusted for that channel's characteristics. The current balance circuit applies different timing shifts to different channels based on their individual current detection results, allowing each channel to be optimized locally for equal current sharing.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS8957660B2Current balance circuit and multiphase DC-DC converter and current balance method thereof
Publication Date: 2015.02.17 ANPEC ELECTRONICS CORPORATION
  • US8957660B2 patent drawing
  • US8957660B2 patent drawing
  • US8957660B2 patent drawing

AI summary

The present invention discloses a current balance circuit for a multiphase DC-DC converter. The current balance circuit comprises a current error calculation circuit, for generating a plurality of current balance signals indicating imbalance levels of a plurality of inductor currents of a plurality of channels of the multiphase DC-DC converter according to a plurality of current sensing signals of the plurality of channels, a time shift circuit, for adjusting pulse widths of a plurality of clock signals according to the plurality of current balance signals, and a ramp generator, for deciding shift levels of a plurality of ramp signals according to the plurality of clock signals.