Current Bias Circuit With Clamp Filtering for Fast Stable Biasing
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Solution Overview
Problem
Current memory chip technologies face challenges in generating a bias current that is both fast and stable, with existing solutions like LDOs having poor power supply rejection capability at high frequencies and occupying large areas, which hinders miniaturization and meets only partial speed requirements.
Innovation Solution
A current bias circuit comprising a voltage stabilizing circuit and a main circuit, where the voltage stabilizing circuit uses a clamp circuit to filter out power supply noise and generate a stable second voltage, allowing for faster stabilization and reduced area occupancy, thereby improving power supply rejection and meeting high-speed requirements without the need for numerous decoupling capacitors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If LDO (Low Dropout Regulator) is used to generate bias current, then power supply rejection capability is improved, but circuit area increases and high-frequency performance deteriorates
Solution Approach 1:
The voltage stabilizing circuit is divided into multiple functional modules: clamp circuit for noise filtering, main circuit for voltage stabilization, and feedback circuit for regulation. This segmentation allows each module to be optimized independently, achieving good power supply rejection without requiring large circuit area.
Solution Approach 2:
The clamp circuit acts as an intermediary between the power supply and the main circuit, filtering out power supply noise before it reaches the voltage stabilization stage. This intermediary approach improves power supply rejection capability while keeping the overall circuit area compact.
2Reliability
If LDO is used to generate bias current, then power supply rejection capability is improved, but response speed deteriorates
Solution Approach 1:
The feedback circuit dynamically adjusts the voltage stabilization process by continuously monitoring the output voltage and adjusting the clamp circuit operation accordingly. This dynamic regulation enables fast response to power supply variations while maintaining good power supply rejection capability.
Solution Approach 2:
The feedback circuit provides real-time regulation by detecting voltage deviations and adjusting the clamp circuit to correct them. This feedback mechanism enables the circuit to respond quickly to power supply noise while maintaining stable output, resolving the contradiction between response speed and power supply rejection.
3Reliability
If numerous decoupling capacitors are used to filter power supply noise, then power supply rejection capability is improved, but chip area increases
Solution Approach 1:
The circuit replaces the traditional mechanical approach of using numerous decoupling capacitors with an active electronic solution consisting of the clamp circuit and feedback mechanism. This substitution achieves superior noise filtering performance with minimal chip area occupation.
Solution Approach 2:
The clamp circuit changes the operating parameters of the voltage stabilization process by actively controlling the voltage level based on feedback, rather than relying on passive capacitive filtering. This parameter-based approach achieves effective noise rejection without requiring large capacitor values or multiple decoupling components.
Data Source
AI summary
Examples of the present disclosure disclose a current bias circuit, a memory device and a memory system. The current bias circuit includes: a voltage stabilizing circuit configured to output a second voltage through a second terminal of the voltage stabilizing circuit based on a first voltage received by a first terminal of the voltage stabilizing circuit; and a main circuit coupled to the second terminal of the voltage stabilizing circuit at a first terminal of the main circuit, and configured to receive the second voltage output by the second terminal of the voltage stabilizing circuit to generate a bias current.