Current Buffer Feedforward Compensation for Accurate Regulator Feedback

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Solution Overview

Problem

Conventional voltage regulator circuits face issues with feedback signal lag during reference tracking operations, leading to inaccurate control over output voltage due to the introduction of additional zeros in the feedback path, which cannot be adjusted, and result in feedback signal distortion during large signal behaviors.

Innovation Solution

An amplifier circuit with a current buffer that includes a current replication circuit, impedance biasing circuits, and feedforward capacitors to generate independently adjustable zeros, allowing for improved frequency compensation and feedback signal accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a feedforward capacitor is added in the feedback path to improve frequency response, then loop bandwidth and phase margin are improved, but the feedback signal lags during reference tracking operations and does not accurately reflect the output voltage state

Engineering Contradiction:
Improveloop bandwidthVSAvoidfeedback signal accuracy
Core Design Contradiction:
SpeedVSLoss of information

Solution Approach 1:

The patent segments the feedback path by introducing a parallel feedforward path with capacitor CFF alongside the resistive feedback path (R1 and R2). This creates two separate signal paths: one for DC/low-frequency feedback through resistors and another for high-frequency compensation through the capacitor, allowing each path to perform its specialized function without interfering with the other's accuracy.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The feedforward capacitor CFF acts as an intermediary element that mediates between the output voltage and the feedback signal by providing an alternative high-frequency path. During transient conditions, the capacitor quickly charges/discharges to provide immediate feedback response, while during steady-state, the resistive path maintains accurate DC feedback, thus the capacitor mediates the timing discrepancy between output changes and feedback response.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If a feedforward capacitor is added to improve frequency response, then phase margin and PSRR are improved, but feedback signal distortion occurs during large signal behaviors

Engineering Contradiction:
Improvephase marginVSAvoidfeedback signal distortion
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies local quality by making the feedforward capacitor CFF significantly larger than the equivalent capacitance at the first and second nodes, creating a localized high-frequency bypass path with specific characteristics. This localized capacitor provides targeted phase compensation exactly where needed in the feedback path without affecting the overall feedback signal integrity during large signal operations.

Inventive Principle:
Principle #3Local quality

3Device complexity

If the feedback gain is set to 1 (R2=0) to simplify the circuit, then device complexity is reduced, but it becomes impossible to improve frequency response by setting a feedforward capacitor in the feedback path

Engineering Contradiction:
Improvefeedback circuit complexityVSAvoidfrequency response
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The patent introduces dynamic behavior through the feedforward capacitor CFF that activates selectively based on signal frequency and transient conditions. The capacitor dynamically switches between being effectively open-circuit during DC/low-frequency operation (when R2=0) and being effective during high-frequency transients, thus providing frequency-dependent feedback enhancement without requiring permanent circuit complexity.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20250274089A1Amplifier circuit and current buffer thereof
Publication Date: 2025.08.28 RICHTEK TECH
  • US20250274089A1 patent drawing
  • US20250274089A1 patent drawing
  • US20250274089A1 patent drawing

AI summary

A current buffer includes: a current replication circuit for generating a first intermediate current at a first node and a second intermediate current at a second node according to an input current; a first impedance biasing circuit for providing a first input impedance at the first node and generating an output current according to a current flowing through the first node; a second impedance biasing circuit for providing a second input impedance at the second node; and a feedforward capacitor coupled between the first node and the second node. The first input impedance is lower than the second input impedance, such that a current gain between the output current and the input current has a zero and a pole which are related to the feedforward capacitor and the second input impedance. The zero has a lower frequency than the pole.