Current-Canceling CMOS VGA for Linear Transmitter Gain Control
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Solution Overview
Problem
Conventional wireless transmitters face issues due to voltage-to-current and current-to-voltage conversions, which introduce nonlinearities, increase power consumption, and require additional devices, and also struggle with achieving a linear gain control curve when not using bipolar transistors.
Innovation Solution
A CMOS transmitter design that operates in the current mode, eliminating voltage-to-current and current-to-voltage conversions, and employs current canceling variable gain amplifiers to achieve a linear relationship between power output and control voltage, using a combination of current canceling VGAs and transformers for impedance matching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional voltage-to-current and current-to-voltage conversions are used in CMOS transmitter, then signal transmission is achieved, but nonlinearities are introduced and power consumption increases
Solution Approach 1:
The patent extracts and eliminates the voltage-to-current and current-to-voltage conversion stages from the CMOS transmitter signal path. By operating entirely in current mode from the DAC through the VGA to the output, the design removes the conversion interfaces that cause nonlinearities and excessive power consumption, while maintaining signal transmission functionality.
Solution Approach 2:
The patent substitutes the conventional voltage-mode operation with a current-mode operation system. Instead of using voltage signals that require conversion to current and back, the entire signal chain operates with current signals, replacing the mechanical conversion process with a direct current-mode processing approach that reduces power consumption and improves linearity.
2Reliability
If voltage-to-current and current-to-voltage conversions are performed, then signal processing is completed, but additional devices are required
Solution Approach 1:
The patent removes the voltage-to-current converter and current-to-voltage converter devices from the transmitter architecture. By adopting a pure current-mode design, these conversion devices are extracted and eliminated, reducing the total device count and simplifying the circuit while maintaining complete signal processing capability through current-mode operations.
3Ease of manufacture
If conventional VGA designs are used without bipolar transistors, then CMOS compatibility is maintained, but linear gain control curve is difficult to achieve
Solution Approach 1:
The patent changes the operating parameters of the VGA by implementing a current-mode design with specific current mirror configurations and control schemes. This parameter change enables linear gain control in CMOS technology without requiring bipolar transistors, achieving both CMOS compatibility and improved gain linearity through optimized current control parameters.
Solution Approach 2:
The patent implements feedback mechanisms in the current-mode VGA design to achieve linear gain control. By using feedback to compensate for nonlinearities in the current amplification process, the system maintains CMOS compatibility while achieving precise linear gain control that would be difficult to obtain with conventional voltage-mode CMOS VGAs.
Data Source
AI summary
A current canceling CMOS variable gain amplifier includes a first leg and a second leg. The first leg has a first input line, a first output line, a first ON transistor, a first control transistor and a first subtracting transistor. The second leg has a second input line, a second output line, a second ON transistor, a second control transistor and a second subtracting transistor. The second input line can provide a second input current. The second output line can provide a second output current. The first input line is arranged to provide a first input current to each of the first ON transistor, the first control transistor and the first subtracting transistor. The second input line is arranged to provide a second input current to each of the second ON transistor, the second control transistor and the second subtracting transistor. The first output line is in electrical connection with each of the first ON transistor, the first control transistor and the second subtracting transistor. The second output line is in electrical connection with each of the second ON transistor, the second control transistor and the first subtracting transistor.


