Current Controlled Recall Schema for Memory Reliability
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Solution Overview
Problem
High density memory circuits face issues with false, premature latching in volatile memory cells due to very low recall currents and imbalanced potentials, which conventional techniques struggle to address effectively.
Innovation Solution
A current-controlled RECALL scheme is implemented, utilizing a current regulating circuit to manage the current flow between volatile and non-volatile memory cells, reducing leakage currents and transistor mismatch by dynamically controlling the voltage and current during the RECALL operation, and employing a controlled current source to stabilize the recall process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If recall currents are increased to prevent false latching, then reliability improves, but voltage balance in the volatile latch deteriorates causing imbalanced potentials
Solution Approach 1:
The patent implements dynamic control of recall current through a current regulating circuit that adjusts the current magnitude during the recall operation. The circuit transitions from a static recall current source to a dynamic system that modulates current based on the charging state of the non-volatile cell, preventing both false latching and voltage imbalance by adapting current strength to operational needs
Solution Approach 2:
The patent changes the electrical parameters (current magnitude and duration) of the recall operation through the current regulating circuit. By controlling the recall current waveform and duration, the system optimizes the charging process of the non-volatile cell, ensuring reliable state transfer while maintaining voltage balance in the volatile latch structure
2Productivity
If high density memory circuits are used to increase storage capacity, then productivity improves, but false premature latching increases due to very low recall currents
Solution Approach 1:
The patent introduces a current regulating circuit as an intermediary component between the recall current source and the memory cells. This intermediary actively manages the current delivery, ensuring sufficient current strength for reliable recall operations in high-density circuits while preventing the harmful effects of current imbalance, thus enabling high capacity without sacrificing accuracy
3Device complexity
If conventional recall techniques are used to maintain simplicity, then device complexity remains low, but false latching occurs due to insufficient current control
Solution Approach 1:
The current regulating circuit is designed to automatically adjust recall current parameters based on the operational state of the memory cells. The circuit monitors the charging process and self-regulates current delivery, eliminating the need for complex external control mechanisms while maintaining high recall accuracy and preventing false latching in dense memory configurations
Data Source
AI summary
A memory circuit includes a controlled current source coupled to an input to a nonvolatile cell, and a second controlled current source coupled to a volatile cell, the volatile cell coupled to receive current from the controlled current source via the nonvolatile cell.